1 /* Copyright 2013 Freescale Semiconductor, Inc.
3 * SPDX-License-Identifier: GPL-2.0+
12 #include <fsl_esdhc.h>
13 #include <spi_flash.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 phys_size_t get_effective_memsize(void)
19 return CONFIG_SYS_L3_SIZE;
22 unsigned long get_board_sys_clk(void)
24 return CONFIG_SYS_CLK_FREQ;
27 unsigned long get_board_ddr_clk(void)
29 return CONFIG_DDR_CLK_FREQ;
32 #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
33 void board_init_f(ulong bootflag)
35 u32 plat_ratio, sys_clk, uart_clk;
36 #ifdef CONFIG_SPL_NAND_BOOT
39 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
41 #ifdef CONFIG_SPL_NAND_BOOT
43 * There is T1040 SoC issue where NOR, FPGA are inaccessible during
44 * NAND boot because IFC signals > IFC_AD7 are not enabled.
45 * This workaround changes RCW source to make all signals enabled.
47 porsr1 = in_be32(&gur->porsr1);
48 pinctl = ((porsr1 & ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK)) | 0x24800000);
49 out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR + 0x20000), pinctl);
52 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
53 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
55 /* Update GD pointer */
56 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
58 /* compiler optimization barrier needed for GCC >= 3.4 */
59 __asm__ __volatile__("" : : : "memory");
63 /* initialize selected port with appropriate baud rate */
64 sys_clk = get_board_sys_clk();
65 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
66 uart_clk = sys_clk * plat_ratio / 2;
68 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
69 uart_clk / 16 / CONFIG_BAUDRATE);
71 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
74 void board_init_r(gd_t *gd, ulong dest_addr)
78 bd = (bd_t *)(gd + sizeof(gd_t));
79 memset(bd, 0, sizeof(bd_t));
81 bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
82 bd->bi_memsize = CONFIG_SYS_L3_SIZE;
86 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
87 CONFIG_SPL_RELOC_MALLOC_SIZE);
89 #ifdef CONFIG_SPL_MMC_BOOT
93 /* relocate environment function pointers etc. */
94 #ifdef CONFIG_SPL_NAND_BOOT
95 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
96 (uchar *)CONFIG_ENV_ADDR);
98 #ifdef CONFIG_SPL_MMC_BOOT
99 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
100 (uchar *)CONFIG_ENV_ADDR);
102 #ifdef CONFIG_SPL_SPI_BOOT
103 spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
104 (uchar *)CONFIG_ENV_ADDR);
106 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
113 gd->ram_size = initdram(0);
115 #ifdef CONFIG_SPL_MMC_BOOT
117 #elif defined(CONFIG_SPL_SPI_BOOT)
119 #elif defined(CONFIG_SPL_NAND_BOOT)