2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 #ifndef __T4020QDS_QIXIS_H__
21 #define __T4020QDS_QIXIS_H__
23 /* Definitions of QIXIS Registers for T4020QDS */
25 /* BRDCFG4[4:7]] select EC1 and EC2 as a pair */
26 #define BRDCFG4_EMISEL_MASK 0xE0
27 #define BRDCFG4_EMISEL_SHIFT 5
30 #define QIXIS_SYSCLK_66 0x0
31 #define QIXIS_SYSCLK_83 0x1
32 #define QIXIS_SYSCLK_100 0x2
33 #define QIXIS_SYSCLK_125 0x3
34 #define QIXIS_SYSCLK_133 0x4
35 #define QIXIS_SYSCLK_150 0x5
36 #define QIXIS_SYSCLK_160 0x6
37 #define QIXIS_SYSCLK_166 0x7
40 #define QIXIS_DDRCLK_66 0x0
41 #define QIXIS_DDRCLK_100 0x1
42 #define QIXIS_DDRCLK_125 0x2
43 #define QIXIS_DDRCLK_133 0x3
45 #define BRDCFG5_RESET 0x00
47 #define BRDCFG12_SD3EN_MASK 0x20
48 #define BRDCFG12_SD3MX_MASK 0x08
49 #define BRDCFG12_SD3MX_SLOT5 0x08
50 #define BRDCFG12_SD3MX_SLOT6 0x00
51 #define BRDCFG12_SD4EN_MASK 0x04
52 #define BRDCFG12_SD4MX_MASK 0x03
53 #define BRDCFG12_SD4MX_SLOT7 0x02
54 #define BRDCFG12_SD4MX_SLOT8 0x01
55 #define BRDCFG12_SD4MX_AURO_SATA 0x00