3 * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
5 * Support for the Elmeg VoVPN Gateway Module
6 * ------------------------------------------
7 * Initialize Marvell M88E6060 Switch
9 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/m8260_pci.h>
21 #if defined(CONFIG_CMD_NET)
22 static int prtTab[M88X_PRT_CNT] = { 8, 9, 10, 11, 12, 13 };
23 static int phyTab[M88X_PHY_CNT] = { 0, 1, 2, 3, 4 };
25 static m88x_regCfg_t prtCfg0[] = {
26 { 4, 0x3e7c, 0x8000 },
27 { 4, 0x3e7c, 0x8003 },
28 { 6, 0x0fc0, 0x001e },
29 { -1, 0xffff, 0x0000 }
32 static m88x_regCfg_t prtCfg1[] = {
33 { 4, 0x3e7c, 0x8000 },
34 { 4, 0x3e7c, 0x8003 },
35 { 6, 0x0fc0, 0x001d },
36 { -1, 0xffff, 0x0000 }
39 static m88x_regCfg_t prtCfg2[] = {
40 { 4, 0x3e7c, 0x8000 },
41 { 4, 0x3e7c, 0x8003 },
42 { 6, 0x0fc0, 0x001b },
43 { -1, 0xffff, 0x0000 }
46 static m88x_regCfg_t prtCfg3[] = {
47 { 4, 0x3e7c, 0x8000 },
48 { 4, 0x3e7c, 0x8003 },
49 { 6, 0x0fc0, 0x0017 },
50 { -1, 0xffff, 0x0000 }
53 static m88x_regCfg_t prtCfg4[] = {
54 { 4, 0x3e7c, 0x8000 },
55 { 4, 0x3e7c, 0x8003 },
56 { 6, 0x0fc0, 0x000f },
57 { -1, 0xffff, 0x0000 }
60 static m88x_regCfg_t *prtCfg[M88X_PRT_CNT] = {
61 prtCfg0,prtCfg1,prtCfg2,prtCfg3,prtCfg4,NULL
64 static m88x_regCfg_t phyCfgX[] = {
65 { 4, 0xfa1f, 0x01e0 },
66 { 0, 0x213f, 0x1200 },
67 { 24, 0x81ff, 0x1200 },
68 { -1, 0xffff, 0x0000 }
71 static m88x_regCfg_t *phyCfg[M88X_PHY_CNT] = {
72 phyCfgX,phyCfgX,phyCfgX,phyCfgX,NULL
77 m88e6060_dump( int devAddr )
80 unsigned short val[6];
82 printf( "M88E6060 Register Dump\n" );
83 printf( "====================================\n" );
84 printf( "PortNo 0 1 2 3 4 5\n" );
86 miiphy_read( devAddr+prtTab[i],M88X_PRT_STAT,&val[i] );
87 printf( "STAT %04hx %04hx %04hx %04hx %04hx %04hx\n",
88 val[0],val[1],val[2],val[3],val[4],val[5] );
91 miiphy_read( devAddr+prtTab[i],M88X_PRT_ID,&val[i] );
92 printf( "ID %04hx %04hx %04hx %04hx %04hx %04hx\n",
93 val[0],val[1],val[2],val[3],val[4],val[5] );
96 miiphy_read( devAddr+prtTab[i],M88X_PRT_CNTL,&val[i] );
97 printf( "CNTL %04hx %04hx %04hx %04hx %04hx %04hx\n",
98 val[0],val[1],val[2],val[3],val[4],val[5] );
101 miiphy_read( devAddr+prtTab[i],M88X_PRT_VLAN,&val[i] );
102 printf( "VLAN %04hx %04hx %04hx %04hx %04hx %04hx\n",
103 val[0],val[1],val[2],val[3],val[4],val[5] );
106 miiphy_read( devAddr+prtTab[i],M88X_PRT_PAV,&val[i] );
107 printf( "PAV %04hx %04hx %04hx %04hx %04hx %04hx\n",
108 val[0],val[1],val[2],val[3],val[4],val[5] );
111 miiphy_read( devAddr+prtTab[i],M88X_PRT_RX,&val[i] );
112 printf( "RX %04hx %04hx %04hx %04hx %04hx %04hx\n",
113 val[0],val[1],val[2],val[3],val[4],val[5] );
116 miiphy_read( devAddr+prtTab[i],M88X_PRT_TX,&val[i] );
117 printf( "TX %04hx %04hx %04hx %04hx %04hx %04hx\n",
118 val[0],val[1],val[2],val[3],val[4],val[5] );
120 printf( "------------------------------------\n" );
121 printf( "PhyNo 0 1 2 3 4\n" );
122 for (i=0; i<9; i++) {
123 for (j=0; j<5; j++) {
124 miiphy_read( devAddr+phyTab[j],i,&val[j] );
126 printf( "0x%02x %04hx %04hx %04hx %04hx %04hx\n",
127 i,val[0],val[1],val[2],val[3],val[4] );
129 for (i=0x10; i<0x1d; i++) {
130 for (j=0; j<5; j++) {
131 miiphy_read( devAddr+phyTab[j],i,&val[j] );
133 printf( "0x%02x %04hx %04hx %04hx %04hx %04hx\n",
134 i,val[0],val[1],val[2],val[3],val[4] );
140 m88e6060_initialize( int devAddr )
142 static char *_f = "m88e6060_initialize:";
148 /*** reset all phys into powerdown ************************************/
149 for (i=0, err=0; i<M88X_PHY_CNT; i++) {
150 err += bb_miiphy_read(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,&val );
151 /* keep SpeedLSB, Duplex */
153 /* set SWReset, AnegEn, PwrDwn, RestartAneg */
155 err += bb_miiphy_write(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,val );
158 printf( "%s [ERR] reset phys\n",_f );
162 /*** disable all ports ************************************************/
163 for (i=0, err=0; i<M88X_PRT_CNT; i++) {
164 err += bb_miiphy_read(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,&val );
166 err += bb_miiphy_write(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,val );
169 printf( "%s [ERR] disable ports\n",_f );
173 /*** initialize switch ************************************************/
174 /* set switch mac addr */
175 #define ea eth_get_dev()->enetaddr
176 val = (ea[4] << 8) | ea[5];
177 err = bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC45,val );
178 val = (ea[2] << 8) | ea[3];
179 err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC23,val );
180 val = (ea[0] << 8) | ea[1];
182 val &= 0xfeff; /* clear DiffAddr */
183 err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC01,val );
185 printf( "%s [ERR] switch mac address register\n",_f );
189 /* !DiscardExcessive, MaxFrameSize, CtrMode */
190 err = bb_miiphy_read(NULL, devAddr+15,M88X_GLB_CNTL,&val );
193 err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_CNTL,val );
195 printf( "%s [ERR] switch global control register\n",_f );
199 /* LernDis off, ATUSize 1024, AgeTime 5min */
200 err = bb_miiphy_read(NULL, devAddr+15,M88X_ATU_CNTL,&val );
203 err += bb_miiphy_write(NULL, devAddr+15,M88X_ATU_CNTL,val );
205 printf( "%s [ERR] atu control register\n",_f );
209 /*** initialize ports *************************************************/
210 for (i=0; i<M88X_PRT_CNT; i++) {
211 if ((p = prtCfg[i]) == NULL) {
214 while (p->reg != -1) {
216 err += bb_miiphy_read(NULL, devAddr+prtTab[i],p->reg,&val );
219 err += bb_miiphy_write(NULL, devAddr+prtTab[i],p->reg,val );
221 printf( "%s [ERR] config port %d register %d\n",_f,i,p->reg );
228 /*** initialize phys **************************************************/
229 for (i=0; i<M88X_PHY_CNT; i++) {
230 if ((p = phyCfg[i]) == NULL) {
233 while (p->reg != -1) {
235 err += bb_miiphy_read(NULL, devAddr+phyTab[i],p->reg,&val );
238 err += bb_miiphy_write(NULL, devAddr+phyTab[i],p->reg,val );
240 printf( "%s [ERR] config phy %d register %d\n",_f,i,p->reg );