3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/processor.h>
12 #define MEM_MCOPT1_INIT_VAL 0x00800000
13 #define MEM_RTR_INIT_VAL 0x04070000
14 #define MEM_PMIT_INIT_VAL 0x07c00000
15 #define MEM_MB0CF_INIT_VAL 0x00082001
16 #define MEM_MB1CF_INIT_VAL 0x04082000
17 #define MEM_SDTR1_INIT_VAL 0x00854005
18 #define SDRAM0_CFG_ENABLE 0x80000000
20 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
22 int board_early_init_f (void)
25 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
26 mtdcr (UIC0ER, 0x00000000); /* disable all ints */
27 mtdcr (UIC0CR, 0x00000010);
28 mtdcr (UIC0PR, 0xFFFF7FF0); /* set int polarities */
29 mtdcr (UIC0TR, 0x00000010); /* set int trigger levels */
30 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
32 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
33 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
34 mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
35 mtdcr(UIC0PR, 0xFFFFFFF0); /* set int polarities */
36 mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
37 mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/
38 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
43 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
45 mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
52 int misc_init_f (void)
54 return 0; /* dummy implementation */
58 int misc_init_r (void)
60 #if defined(CONFIG_CMD_NAND)
62 * Set NAND-FLASH GPIO signals to default
64 out32(GPIO0_OR, in32(GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE));
65 out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);
73 * Check Board Identity:
78 int i = getenv_f("serial#", str, sizeof(str));
83 puts ("### No HW ID - assuming G2000");
94 /* -------------------------------------------------------------------------
95 G2000 rev B is an embeded design. we don't read for spd of this version.
96 Doing static SDRAM controller configuration in the following section.
97 ------------------------------------------------------------------------- */
99 long int init_sdram_static_settings(void)
101 /* disable memcontroller so updates work */
102 mtsdram(SDRAM0_CFG, MEM_MCOPT1_INIT_VAL);
103 mtsdram(SDRAM0_RTR, MEM_RTR_INIT_VAL);
104 mtsdram(SDRAM0_PMIT, MEM_PMIT_INIT_VAL);
105 mtsdram(SDRAM0_B0CR, MEM_MB0CF_INIT_VAL);
106 mtsdram(SDRAM0_B1CR, MEM_MB1CF_INIT_VAL);
107 mtsdram(SDRAM0_TR, MEM_SDTR1_INIT_VAL);
109 /* SDRAM have a power on delay, 500 micro should do */
111 mtsdram(SDRAM0_CFG, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE);
113 return (CONFIG_SYS_SDRAM_SIZE); /* CONFIG_SYS_SDRAM_SIZE is in G2000.h */
117 phys_size_t initdram (int board_type)
121 /* flzt, we can still turn this on in the future */
122 /* #ifdef CONFIG_SPD_EEPROM
125 ret = init_sdram_static_settings();
129 ret = init_sdram_static_settings();
134 #if 0 /* test-only !!! */
135 int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
139 printf("\nEBC registers for PPC405GP:\n");
140 mfebc(PB0AP, ap); mfebc(PB0CR, cr);
141 printf("0: AP=%08lx CP=%08lx\n", ap, cr);
142 mfebc(PB1AP, ap); mfebc(PB1CR, cr);
143 printf("1: AP=%08lx CP=%08lx\n", ap, cr);
144 mfebc(PB2AP, ap); mfebc(PB2CR, cr);
145 printf("2: AP=%08lx CP=%08lx\n", ap, cr);
146 mfebc(PB3AP, ap); mfebc(PB3CR, cr);
147 printf("3: AP=%08lx CP=%08lx\n", ap, cr);
148 mfebc(PB4AP, ap); mfebc(PB4CR, cr);
149 printf("4: AP=%08lx CP=%08lx\n", ap, cr);
155 dumpebc, 1, 1, do_dumpebc,
156 "Dump all EBC registers",
161 int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
165 printf("\nDevice Configuration Registers (DCR's) for PPC405GP:");
166 for (i=0; i<=0x1e0; i++) {
168 printf("\n%04x ", i);
170 printf("%08lx ", get_dcr(i));
177 dumpdcr, 1, 1, do_dumpdcr,
178 "Dump all DCR registers",
183 int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
185 printf("\nSpecial Purpose Registers (SPR's) for PPC405GP:");
186 printf("\n%04x %08x ", 947, mfspr(947));
187 printf("\n%04x %08x ", 9, mfspr(9));
188 printf("\n%04x %08x ", 1014, mfspr(1014));
189 printf("\n%04x %08x ", 1015, mfspr(1015));
190 printf("\n%04x %08x ", 1010, mfspr(1010));
191 printf("\n%04x %08x ", 957, mfspr(957));
192 printf("\n%04x %08x ", 1008, mfspr(1008));
193 printf("\n%04x %08x ", 1018, mfspr(1018));
194 printf("\n%04x %08x ", 954, mfspr(954));
195 printf("\n%04x %08x ", 950, mfspr(950));
196 printf("\n%04x %08x ", 951, mfspr(951));
197 printf("\n%04x %08x ", 981, mfspr(981));
198 printf("\n%04x %08x ", 980, mfspr(980));
199 printf("\n%04x %08x ", 982, mfspr(982));
200 printf("\n%04x %08x ", 1012, mfspr(1012));
201 printf("\n%04x %08x ", 1013, mfspr(1013));
202 printf("\n%04x %08x ", 948, mfspr(948));
203 printf("\n%04x %08x ", 949, mfspr(949));
204 printf("\n%04x %08x ", 1019, mfspr(1019));
205 printf("\n%04x %08x ", 979, mfspr(979));
206 printf("\n%04x %08x ", 8, mfspr(8));
207 printf("\n%04x %08x ", 945, mfspr(945));
208 printf("\n%04x %08x ", 987, mfspr(987));
209 printf("\n%04x %08x ", 287, mfspr(287));
210 printf("\n%04x %08x ", 953, mfspr(953));
211 printf("\n%04x %08x ", 955, mfspr(955));
212 printf("\n%04x %08x ", 272, mfspr(272));
213 printf("\n%04x %08x ", 273, mfspr(273));
214 printf("\n%04x %08x ", 274, mfspr(274));
215 printf("\n%04x %08x ", 275, mfspr(275));
216 printf("\n%04x %08x ", 260, mfspr(260));
217 printf("\n%04x %08x ", 276, mfspr(276));
218 printf("\n%04x %08x ", 261, mfspr(261));
219 printf("\n%04x %08x ", 277, mfspr(277));
220 printf("\n%04x %08x ", 262, mfspr(262));
221 printf("\n%04x %08x ", 278, mfspr(278));
222 printf("\n%04x %08x ", 263, mfspr(263));
223 printf("\n%04x %08x ", 279, mfspr(279));
224 printf("\n%04x %08x ", 26, mfspr(26));
225 printf("\n%04x %08x ", 27, mfspr(27));
226 printf("\n%04x %08x ", 990, mfspr(990));
227 printf("\n%04x %08x ", 991, mfspr(991));
228 printf("\n%04x %08x ", 956, mfspr(956));
229 printf("\n%04x %08x ", 284, mfspr(284));
230 printf("\n%04x %08x ", 285, mfspr(285));
231 printf("\n%04x %08x ", 986, mfspr(986));
232 printf("\n%04x %08x ", 984, mfspr(984));
233 printf("\n%04x %08x ", 256, mfspr(256));
234 printf("\n%04x %08x ", 1, mfspr(1));
235 printf("\n%04x %08x ", 944, mfspr(944));
241 dumpspr, 1, 1, do_dumpspr,
242 "Dump all SPR registers",