3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/processor.h>
28 #include <asm/ppc4xx-gpio.h>
30 #include <gdsys_fpga.h>
32 #include "../common/osd.h"
34 #define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
35 #define LATCH2_MC2_PRESENT_N 0x0080
38 UNITTYPE_VIDEO_USER = 0,
39 UNITTYPE_MAIN_USER = 1,
40 UNITTYPE_VIDEO_SERVER = 2,
41 UNITTYPE_MAIN_SERVER = 3,
66 static void print_fpga_info(unsigned dev)
68 ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(dev);
69 u16 versions = in_le16(&fpga->versions);
70 u16 fpga_version = in_le16(&fpga->fpga_version);
71 u16 fpga_features = in_le16(&fpga->fpga_features);
73 unsigned hardware_version;
74 unsigned feature_compression;
75 unsigned feature_rs232;
76 unsigned feature_audio;
77 unsigned feature_sysclock;
78 unsigned feature_ramconfig;
79 unsigned feature_carrier_speed;
80 unsigned feature_carriers;
81 unsigned feature_video_channels;
82 int fpga_state = get_fpga_state(dev);
84 printf("FPGA%d: ", dev);
86 hardware_version = versions & 0x000f;
89 && !((hardware_version == HWVER_101)
90 && (fpga_state == FPGA_STATE_DONE_FAILED))) {
91 puts("not available\n");
92 print_fpga_state(dev);
96 unit_type = (versions >> 4) & 0x000f;
97 hardware_version = versions & 0x000f;
98 feature_compression = (fpga_features >> 13) & 0x0003;
99 feature_rs232 = fpga_features & (1<<11);
100 feature_audio = (fpga_features >> 9) & 0x0003;
101 feature_sysclock = (fpga_features >> 7) & 0x0003;
102 feature_ramconfig = (fpga_features >> 5) & 0x0003;
103 feature_carrier_speed = fpga_features & (1<<4);
104 feature_carriers = (fpga_features >> 2) & 0x0003;
105 feature_video_channels = fpga_features & 0x0003;
108 case UNITTYPE_VIDEO_USER:
109 printf("Videochannel Userside");
112 case UNITTYPE_MAIN_USER:
113 printf("Mainchannel Userside");
116 case UNITTYPE_VIDEO_SERVER:
117 printf("Videochannel Serverside");
120 case UNITTYPE_MAIN_SERVER:
121 printf("Mainchannel Serverside");
125 printf("UnitType %d(not supported)", unit_type);
129 switch (hardware_version) {
131 printf(" HW-Ver 1.01\n");
135 printf(" HW-Ver 1.10\n");
139 printf(" HW-Ver %d(not supported)\n",
144 printf(" FPGA V %d.%02d, features:",
145 fpga_version / 100, fpga_version % 100);
147 printf(" %sRS232", feature_rs232 ? "" : "no ");
149 switch (feature_audio) {
151 printf(", no audio");
155 printf(", audio tx");
159 printf(", audio rx");
163 printf(", audio rx+tx");
167 printf(", audio %d(not supported)", feature_audio);
171 switch (feature_sysclock) {
173 printf(", clock 156.25 MHz");
177 printf(", clock %d(not supported)", feature_sysclock);
183 switch (feature_ramconfig) {
189 printf("RAM 32 bit DDR2");
193 printf("RAM 64 bit DDR2");
197 printf("RAM %d(not supported)", feature_ramconfig);
201 printf(", %d carrier(s) %s", feature_carriers,
202 feature_carrier_speed ? "10 Gbit/s" : "of unknown speed");
204 printf(", %d video channel(s)\n", feature_video_channels);
208 * Check Board Identity:
212 char *s = getenv("serial#");
213 u16 latch2 = in_le16((void *)LATCH2_BASE);
217 printf("DLVision 10G");
227 if (!(latch2 & LATCH2_MC2_PRESENT_N))
233 int last_stage_init(void)
235 ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
236 u16 versions = in_le16(&fpga->versions);
237 u16 latch2 = in_le16((void *)LATCH2_BASE);
239 if (((versions >> 4) & 0x000f) != UNITTYPE_MAIN_USER)
242 if (!get_fpga_state(0))
245 if (!(latch2 & LATCH2_MC2_PRESENT_N) && !get_fpga_state(1))