3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/processor.h>
28 #include <asm/ppc4xx-gpio.h>
30 #include <gdsys_fpga.h>
32 #include "../common/osd.h"
34 #define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
35 #define LATCH2_MC2_PRESENT_N 0x0080
37 #define LATCH3_BASE (CONFIG_SYS_LATCH_BASE + 0x300)
40 UNITTYPE_VIDEO_USER = 0,
41 UNITTYPE_MAIN_USER = 1,
42 UNITTYPE_VIDEO_SERVER = 2,
43 UNITTYPE_MAIN_SERVER = 3,
68 static unsigned int get_hwver(void)
70 u16 latch3 = in_le16((void *)LATCH3_BASE);
72 return latch3 & 0x0003;
75 static unsigned int get_mc2_present(void)
77 u16 latch2 = in_le16((void *)LATCH2_BASE);
79 return !(latch2 & LATCH2_MC2_PRESENT_N);
82 static void print_fpga_info(unsigned dev)
84 ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(dev);
85 u16 versions = in_le16(&fpga->versions);
86 u16 fpga_version = in_le16(&fpga->fpga_version);
87 u16 fpga_features = in_le16(&fpga->fpga_features);
89 unsigned hardware_version;
90 unsigned feature_compression;
91 unsigned feature_rs232;
92 unsigned feature_audio;
93 unsigned feature_sysclock;
94 unsigned feature_ramconfig;
95 unsigned feature_carrier_speed;
96 unsigned feature_carriers;
97 unsigned feature_video_channels;
98 int fpga_state = get_fpga_state(dev);
100 printf("FPGA%d: ", dev);
102 hardware_version = versions & 0x000f;
105 && !((hardware_version == HWVER_101)
106 && (fpga_state == FPGA_STATE_DONE_FAILED))) {
107 puts("not available\n");
108 print_fpga_state(dev);
112 unit_type = (versions >> 4) & 0x000f;
113 hardware_version = versions & 0x000f;
114 feature_compression = (fpga_features >> 13) & 0x0003;
115 feature_rs232 = fpga_features & (1<<11);
116 feature_audio = (fpga_features >> 9) & 0x0003;
117 feature_sysclock = (fpga_features >> 7) & 0x0003;
118 feature_ramconfig = (fpga_features >> 5) & 0x0003;
119 feature_carrier_speed = fpga_features & (1<<4);
120 feature_carriers = (fpga_features >> 2) & 0x0003;
121 feature_video_channels = fpga_features & 0x0003;
124 case UNITTYPE_VIDEO_USER:
125 printf("Videochannel Userside");
128 case UNITTYPE_MAIN_USER:
129 printf("Mainchannel Userside");
132 case UNITTYPE_VIDEO_SERVER:
133 printf("Videochannel Serverside");
136 case UNITTYPE_MAIN_SERVER:
137 printf("Mainchannel Serverside");
141 printf("UnitType %d(not supported)", unit_type);
145 switch (hardware_version) {
147 printf(" HW-Ver 1.01\n");
151 printf(" HW-Ver 1.10\n");
155 printf(" HW-Ver %d(not supported)\n",
160 printf(" FPGA V %d.%02d, features:",
161 fpga_version / 100, fpga_version % 100);
163 printf(" %sRS232", feature_rs232 ? "" : "no ");
165 switch (feature_audio) {
167 printf(", no audio");
171 printf(", audio tx");
175 printf(", audio rx");
179 printf(", audio rx+tx");
183 printf(", audio %d(not supported)", feature_audio);
187 switch (feature_sysclock) {
189 printf(", clock 156.25 MHz");
193 printf(", clock %d(not supported)", feature_sysclock);
199 switch (feature_ramconfig) {
205 printf("RAM 32 bit DDR2");
209 printf("RAM 64 bit DDR2");
213 printf("RAM %d(not supported)", feature_ramconfig);
217 printf(", %d carrier(s) %s", feature_carriers,
218 feature_carrier_speed ? "10 Gbit/s" : "of unknown speed");
220 printf(", %d video channel(s)\n", feature_video_channels);
224 * Check Board Identity:
229 int i = getenv_f("serial#", buf, sizeof(buf));
233 printf("DLVision 10G");
243 if (get_mc2_present())
249 int last_stage_init(void)
251 ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
252 u16 versions = in_le16(&fpga->versions);
254 if (((versions >> 4) & 0x000f) != UNITTYPE_MAIN_USER)
257 if (!get_fpga_state(0) || (get_hwver() == HWVER_101))
260 if (get_mc2_present() &&
261 (!get_fpga_state(1) || (get_hwver() == HWVER_101)))