3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
12 #include <asm/ppc4xx-gpio.h>
15 #include <gdsys_fpga.h>
17 #include "../common/osd.h"
19 #define LATCH0_BASE (CONFIG_SYS_LATCH_BASE)
20 #define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100)
21 #define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
24 UNITTYPE_MAIN_SERVER = 0,
25 UNITTYPE_MAIN_USER = 1,
26 UNITTYPE_VIDEO_SERVER = 2,
27 UNITTYPE_VIDEO_USER = 3,
38 COMPRESSION_TYPE1_DELTA,
57 * Check Board Identity:
61 char *s = getenv("serial#");
77 static void print_fpga_info(void)
79 struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
80 u16 versions = in_le16(&fpga->versions);
81 u16 fpga_version = in_le16(&fpga->fpga_version);
82 u16 fpga_features = in_le16(&fpga->fpga_features);
84 unsigned hardware_version;
85 unsigned feature_compression;
87 unsigned feature_audio;
88 unsigned feature_sysclock;
89 unsigned feature_ramconfig;
90 unsigned feature_carriers;
91 unsigned feature_video_channels;
93 unit_type = (versions & 0xf000) >> 12;
94 hardware_version = versions & 0x000f;
95 feature_compression = (fpga_features & 0xe000) >> 13;
96 feature_osd = fpga_features & (1<<11);
97 feature_audio = (fpga_features & 0x0600) >> 9;
98 feature_sysclock = (fpga_features & 0x0180) >> 7;
99 feature_ramconfig = (fpga_features & 0x0060) >> 5;
100 feature_carriers = (fpga_features & 0x000c) >> 2;
101 feature_video_channels = fpga_features & 0x0003;
104 case UNITTYPE_MAIN_USER:
105 printf("Mainchannel");
108 case UNITTYPE_VIDEO_USER:
109 printf("Videochannel");
113 printf("UnitType %d(not supported)", unit_type);
117 switch (hardware_version) {
119 printf(" HW-Ver 1.00\n");
123 printf(" HW-Ver 1.04\n");
127 printf(" HW-Ver 1.10\n");
131 printf(" HW-Ver %d(not supported)\n",
136 printf(" FPGA V %d.%02d, features:",
137 fpga_version / 100, fpga_version % 100);
140 switch (feature_compression) {
141 case COMPRESSION_NONE:
142 printf(" no compression");
145 case COMPRESSION_TYPE1_DELTA:
146 printf(" type1-deltacompression");
150 printf(" compression %d(not supported)", feature_compression);
154 printf(", %sosd", feature_osd ? "" : "no ");
156 switch (feature_audio) {
158 printf(", no audio");
162 printf(", audio tx");
166 printf(", audio rx");
170 printf(", audio rx+tx");
174 printf(", audio %d(not supported)", feature_audio);
180 switch (feature_sysclock) {
182 printf("clock 147.456 MHz");
186 printf("clock %d(not supported)", feature_sysclock);
190 switch (feature_ramconfig) {
192 printf(", RAM 32 bit DDR2");
196 printf(", RAM %d(not supported)", feature_ramconfig);
200 printf(", %d carrier(s)", feature_carriers);
202 printf(", %d video channel(s)\n", feature_video_channels);
205 int last_stage_init(void)
213 * provide access to fpga gpios (for I2C bitbang)
215 void fpga_gpio_set(int pin)
217 out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x18), pin);
220 void fpga_gpio_clear(int pin)
222 out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x16), pin);
225 int fpga_gpio_get(int pin)
227 return in_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x14)) & pin;
230 void gd405ep_init(void)
234 void gd405ep_set_fpga_reset(unsigned state)
237 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_RESET);
238 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_RESET);
240 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT);
241 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT);
245 void gd405ep_setup_hw(void)
248 * set "startup-finished"-gpios
250 gpio_write_bit(21, 0);
251 gpio_write_bit(22, 1);
254 int gd405ep_get_fpga_done(unsigned fpga)
256 return in_le16((void *)LATCH2_BASE) & CONFIG_SYS_FPGA_DONE(fpga);