3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <gdsys_fpga.h>
15 static int ihs_mdio_idle(struct mii_dev *bus)
17 struct ihs_mdio_info *info = bus->priv;
22 FPGA_GET_REG(info->fpga, mdio.control, &val);
26 } while (!(val & (1 << 12)));
31 static int ihs_mdio_reset(struct mii_dev *bus)
38 static int ihs_mdio_read(struct mii_dev *bus, int addr, int dev_addr,
41 struct ihs_mdio_info *info = bus->priv;
46 FPGA_SET_REG(info->fpga, mdio.control,
47 ((addr & 0x1f) << 5) | (regnum & 0x1f) | (2 << 10));
49 /* wait for rx data available */
52 FPGA_GET_REG(info->fpga, mdio.rx_data, &val);
57 static int ihs_mdio_write(struct mii_dev *bus, int addr, int dev_addr,
58 int regnum, u16 value)
60 struct ihs_mdio_info *info = bus->priv;
64 FPGA_SET_REG(info->fpga, mdio.address_data, value);
65 FPGA_SET_REG(info->fpga, mdio.control,
66 ((addr & 0x1f) << 5) | (regnum & 0x1f) | (1 << 10));
71 int ihs_mdio_init(struct ihs_mdio_info *info)
73 struct mii_dev *bus = mdio_alloc();
76 printf("Failed to allocate FSL MDIO bus\n");
80 bus->read = ihs_mdio_read;
81 bus->write = ihs_mdio_write;
82 bus->reset = ihs_mdio_reset;
83 strcpy(bus->name, info->name);
87 return mdio_register(bus);