3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * based on board/amcc/yosemite/init.S
6 * original Copyright not specified there
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm-offsets.h>
28 #include <ppc_asm.tmpl>
33 /**************************************************************************
36 * This table is used by the cpu boot code to setup the initial tlb
37 * entries. Rather than make broad assumptions in the cpu source tree,
38 * this table lets each board set things up however they like.
40 * Pointer to the table is returned in r1
42 *************************************************************************/
51 * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use
52 * the speed up boot process. It is patched after relocation to enable SA_I
54 tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR,
55 0, AC_RWX | SA_G/*|SA_I*/)
57 /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
58 tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR,
61 tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE,
63 tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE,
67 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE,
69 tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1,
71 tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2,
73 tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3,