2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
3 * Authors: Timur Tabi <timur@freescale.com>
5 * FSL DIU Framebuffer driver
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
15 #include <linux/ctype.h>
17 #include <stdio_dev.h>
19 #include <fsl_diu_fb.h>
21 #define PMUXCR_ELBCDIU_MASK 0xc0000000
22 #define PMUXCR_ELBCDIU_NOR16 0x80000000
23 #define PMUXCR_ELBCDIU_DIU 0x40000000
28 * Note that we need to byte-swap the value before it's written to the AD
29 * register. So even though the registers don't look like they're in the same
30 * bit positions as they are on the MPC8610, the same value is written to the
31 * AD register on the MPC8610 and on the P1022.
33 #define AD_BYTE_F 0x10000000
34 #define AD_ALPHA_C_SHIFT 25
35 #define AD_BLUE_C_SHIFT 23
36 #define AD_GREEN_C_SHIFT 21
37 #define AD_RED_C_SHIFT 19
38 #define AD_PIXEL_S_SHIFT 16
39 #define AD_COMP_3_SHIFT 12
40 #define AD_COMP_2_SHIFT 8
41 #define AD_COMP_1_SHIFT 4
42 #define AD_COMP_0_SHIFT 0
45 * Variables used by the DIU/LBC switching code. It's safe to makes these
46 * global, because the DIU requires DDR, so we'll only run this code after
51 void diu_set_pixel_clock(unsigned int pixclock)
53 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
54 unsigned long speed_ccb, temp;
57 speed_ccb = get_bus_freq(0);
58 temp = 1000000000 / pixclock;
60 pixval = speed_ccb / temp;
61 debug("DIU pixval = %u\n", pixval);
63 /* Modify PXCLK in GUTS CLKDVDR */
64 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF;
65 out_be32(&gur->clkdvdr, temp); /* turn off clock */
66 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16));
69 int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
71 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
74 pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) |
75 (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) |
76 (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) |
77 (8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) |
78 (8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT));
80 printf("DIU: Switching to %ux%u\n", xres, yres);
82 /* Set PMUXCR to switch the muxed pins from the LBC to the DIU */
83 clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU);
84 pmuxcr = in_be32(&gur->pmuxcr);
86 return fsl_diu_init(xres, yres, pixel_format, 0);