git.sur5r.net Git - u-boot/blob - board/google/chromebook_link/Kconfig

   1 if TARGET_CHROMEBOOK_LINK || TARGET_CHROMEBOOK_LINK64
   2
   3 config SYS_BOARD
   4         default "chromebook_link"
   5
   6 config SYS_VENDOR
   7         default "google"
   8
   9 config SYS_SOC
  10         default "ivybridge"
  11
  12 config SYS_CONFIG_NAME
  13         default "chromebook_link"
  14
  15 config SYS_TEXT_BASE
  16         default 0xfff00000 if !SUPPORT_SPL
  17         default 0x10000000 if SUPPORT_SPL
  18
  19 config BOARD_SPECIFIC_OPTIONS # dummy
  20         def_bool y
  21         select X86_RESET_VECTOR
  22         select NORTHBRIDGE_INTEL_IVYBRIDGE
  23         select HAVE_INTEL_ME
  24         select BOARD_ROMSIZE_KB_8192
  25
  26 config PCIE_ECAM_BASE
  27         default 0xf0000000
  28
  29 config EARLY_POST_CROS_EC
  30         bool "Enable early post to Chrome OS EC"
  31         default y
  32
  33 config SYS_CAR_ADDR
  34         hex
  35         default 0xff7e0000
  36
  37 config SYS_CAR_SIZE
  38         hex
  39         default 0x20000
  40
  41 endif