git.sur5r.net Git - u-boot/blob - board/google/chromebook_link/Kconfig

   1 if TARGET_CHROMEBOOK_LINK
   2
   3 config SYS_BOARD
   4         default "chromebook_link"
   5
   6 config SYS_VENDOR
   7         default "google"
   8
   9 config SYS_SOC
  10         default "ivybridge"
  11
  12 config SYS_CONFIG_NAME
  13         default "chromebook_link"
  14
  15 config SYS_TEXT_BASE
  16         default 0xfff00000
  17
  18 config BOARD_SPECIFIC_OPTIONS # dummy
  19         def_bool y
  20         select X86_RESET_VECTOR
  21         select CPU_INTEL_SOCKET_RPGA989
  22         select NORTHBRIDGE_INTEL_IVYBRIDGE
  23         select SOUTHBRIDGE_INTEL_C216
  24         select HAVE_ACPI_RESUME
  25         select BOARD_ROMSIZE_KB_8192
  26
  27 config PCIE_ECAM_BASE
  28         default 0xf0000000
  29
  30 config EARLY_POST_CROS_EC
  31         bool "Enable early post to Chrome OS EC"
  32         default y
  33
  34 config SYS_CAR_ADDR
  35         hex
  36         default 0xff7e0000
  37
  38 config SYS_CAR_SIZE
  39         hex
  40         default 0x20000
  41
  42 endif