3 * ISEE 2007 SL, <www.iseebcn.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <status_led.h>
15 #include <asm/arch/mem.h>
16 #include <asm/arch/mmc_host_def.h>
17 #include <asm/arch/mux.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/mach-types.h>
22 DECLARE_GLOBAL_DATA_PTR;
24 const omap3_sysinfo sysinfo = {
26 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
29 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
30 "IGEP COM MODULE/ELECTRON",
32 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
35 #if defined(CONFIG_ENV_IS_IN_ONENAND)
42 #if defined(CONFIG_CMD_NET)
43 /* GPMC definitions for LAN9221 chips */
44 static const u32 gpmc_lan_config[] = {
45 NET_LAN9221_GPMC_CONFIG1,
46 NET_LAN9221_GPMC_CONFIG2,
47 NET_LAN9221_GPMC_CONFIG3,
48 NET_LAN9221_GPMC_CONFIG4,
49 NET_LAN9221_GPMC_CONFIG5,
50 NET_LAN9221_GPMC_CONFIG6,
54 static const struct ns16550_platdata igep_serial = {
55 .base = OMAP34XX_UART3,
57 .clock = V_NS16550_CLK
60 U_BOOT_DEVICE(igep_uart) = {
67 * Description: Early hardware init.
71 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
73 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
75 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
76 status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
82 #ifdef CONFIG_SPL_BUILD
84 * Routine: omap_rev_string
85 * Description: For SPL builds output board rev
87 void omap_rev_string(void)
92 * Routine: get_board_mem_timings
93 * Description: If we use SPL then there is no x-loader nor config header
94 * so we have to setup the DDR timings ourself on both banks.
96 void get_board_mem_timings(struct board_sdrc_timings *timings)
98 timings->mr = MICRON_V_MR_165;
99 #ifdef CONFIG_BOOT_NAND
100 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
101 timings->ctrla = MICRON_V_ACTIMA_200;
102 timings->ctrlb = MICRON_V_ACTIMB_200;
103 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
105 if (get_cpu_family() == CPU_OMAP34XX) {
106 timings->mcfg = NUMONYX_V_MCFG_165(256 << 20);
107 timings->ctrla = NUMONYX_V_ACTIMA_165;
108 timings->ctrlb = NUMONYX_V_ACTIMB_165;
109 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
112 timings->mcfg = NUMONYX_V_MCFG_200(256 << 20);
113 timings->ctrla = NUMONYX_V_ACTIMA_200;
114 timings->ctrlb = NUMONYX_V_ACTIMB_200;
115 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
121 #if defined(CONFIG_CMD_NET)
123 static void reset_net_chip(int gpio)
125 if (!gpio_request(gpio, "eth nrst")) {
126 gpio_direction_output(gpio, 1);
128 gpio_set_value(gpio, 0);
130 gpio_set_value(gpio, 1);
136 * Routine: setup_net_chip
137 * Description: Setting up the configuration GPMC registers specific to the
140 static void setup_net_chip(void)
142 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
144 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
145 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
147 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
148 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
149 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
150 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
151 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
152 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
153 &ctrl_base->gpmc_nadv_ale);
158 static inline void setup_net_chip(void) {}
161 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
162 int board_mmc_init(bd_t *bis)
164 return omap_mmc_init(0, 0, 0, -1, -1);
168 #if defined(CONFIG_GENERIC_MMC)
169 void board_mmc_power_init(void)
171 twl4030_power_mmc_init(0);
177 switch (gd->bd->bi_arch_number) {
178 case MACH_TYPE_IGEP0020:
179 setenv("fdtfile", "omap3-igep0020.dtb");
181 case MACH_TYPE_IGEP0030:
182 setenv("fdtfile", "omap3-igep0030.dtb");
188 * Routine: misc_init_r
189 * Description: Configure board specific parts
191 int misc_init_r(void)
193 twl4030_power_init();
197 omap_die_id_display();
205 * Routine: set_muxconf_regs
206 * Description: Setting up the configuration Mux registers specific to the
207 * hardware. Many pins need to be moved from protect to primary
210 void set_muxconf_regs(void)
214 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
218 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
223 #if defined(CONFIG_CMD_NET)
224 int board_eth_init(bd_t *bis)
226 #ifdef CONFIG_SMC911X
227 return smc911x_initialize(0, CONFIG_SMC911X_BASE);