2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * Based on imx27lite.c:
6 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
7 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
9 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/iomux-mx25.h>
33 DECLARE_GLOBAL_DATA_PTR;
35 #ifdef CONFIG_SPL_BUILD
36 void board_init_f(ulong bootflag)
39 * copy ourselves from where we are running to where we were
40 * linked at. Use ulong pointers as all addresses involved
43 ulong *start_ptr, *end_ptr, *link_ptr, *run_ptr, *dst;
44 asm volatile ("ldr %0, =_start" : "=r"(start_ptr));
45 asm volatile ("ldr %0, =_end" : "=r"(end_ptr));
46 asm volatile ("ldr %0, =board_init_f" : "=r"(link_ptr));
47 asm volatile ("adr %0, board_init_f" : "=r"(run_ptr));
48 for (dst = start_ptr; dst < end_ptr; dst++)
49 *dst = *(dst+(run_ptr-link_ptr));
51 * branch to nand_boot's link-time address.
53 asm volatile("ldr pc, =nand_boot");
59 * FIXME: need to revisit this
60 * The original code enabled PUE and 100-k pull-down without PKE, so the right
61 * value here is likely:
64 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
66 #define FEC_OUT_PAD_CTRL 0
68 #define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
69 #define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)
71 void tx25_fec_init(void)
73 static const iomux_v3_cfg_t fec_pads[] = {
74 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
75 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
76 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
77 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
78 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
79 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
80 MX25_PAD_FEC_MDIO__FEC_MDIO,
81 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
82 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
84 NEW_PAD_CTRL(MX25_PAD_D13__GPIO_4_7, 0), /* FEC_RESET_B */
85 NEW_PAD_CTRL(MX25_PAD_D11__GPIO_4_9, 0), /* FEC_ENABLE_B */
88 static const iomux_v3_cfg_t fec_cfg_pads[] = {
89 MX25_PAD_FEC_RDATA0__GPIO_3_10,
90 MX25_PAD_FEC_RDATA1__GPIO_3_11,
91 MX25_PAD_FEC_RX_DV__GPIO_3_12,
94 debug("tx25_fec_init\n");
95 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
97 /* drop PHY power and assert reset (low) */
98 gpio_direction_output(GPIO_FEC_RESET_B, 0);
99 gpio_direction_output(GPIO_FEC_ENABLE_B, 0);
103 debug("resetting phy\n");
105 /* turn on PHY power leaving reset asserted */
106 gpio_set_value(GPIO_FEC_ENABLE_B, 1);
111 * Setup some strapping pins that are latched by the PHY
112 * as reset goes high.
114 * Set PHY mode to 111
115 * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
116 * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
117 * mode2 is tied high so nothing to do
120 * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
123 * set each mux mode to gpio mode
125 imx_iomux_v3_setup_multiple_pads(fec_cfg_pads,
126 ARRAY_SIZE(fec_cfg_pads));
129 * set each to 1 and make each an output
131 gpio_direction_output(IMX_GPIO_NR(3, 10), 1);
132 gpio_direction_output(IMX_GPIO_NR(3, 11), 1);
133 gpio_direction_output(IMX_GPIO_NR(3, 12), 1);
135 mdelay(22); /* this value came from RedBoot */
140 gpio_set_value(GPIO_FEC_RESET_B, 1);
147 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
150 #define tx25_fec_init()
153 #ifdef CONFIG_MXC_UART
155 * Set up input pins with hysteresis and 100-k pull-ups
157 #define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
159 * FIXME: need to revisit this
160 * The original code enabled PUE and 100-k pull-down without PKE, so the right
161 * value here is likely:
164 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
166 #define UART1_OUT_PAD_CTRL 0
168 static void tx25_uart1_init(void)
170 static const iomux_v3_cfg_t uart1_pads[] = {
171 NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
172 NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
173 NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
174 NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
177 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
180 #define tx25_uart1_init()
187 /* board id for linux */
188 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
192 int board_late_init(void)
200 /* dram_init must store complete ramsize in gd->ram_size */
201 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
206 void dram_init_banksize(void)
208 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
209 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
211 #if CONFIG_NR_DRAM_BANKS > 1
212 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
213 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
222 printf("KARO TX25\n");