2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * Based on imx27lite.c:
6 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
7 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
9 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/imx25-pinmux.h>
32 static void mdelay(int n)
38 DECLARE_GLOBAL_DATA_PTR;
41 void tx25_fec_init(void)
43 struct iomuxc_mux_ctl *muxctl;
44 struct iomuxc_pad_ctl *padctl;
46 u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
47 struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE;
48 struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE;
49 u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
51 debug("tx25_fec_init\n");
53 * fec pin init is generic
58 * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
60 * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
61 * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
63 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
64 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
66 writel(gpio_mux_mode, &muxctl->pad_d13);
67 writel(gpio_mux_mode, &muxctl->pad_d11);
69 writel(0x0, &padctl->pad_d13);
70 writel(0x0, &padctl->pad_d11);
72 /* drop PHY power and assert reset (low) */
73 val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9));
74 writel(val, &gpio4->gpio_dr);
75 val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9);
76 writel(val, &gpio4->gpio_dir);
80 debug("resetting phy\n");
82 /* turn on PHY power leaving reset asserted */
83 val = readl(&gpio4->gpio_dr) | 1 << 9;
84 writel(val, &gpio4->gpio_dr);
89 * Setup some strapping pins that are latched by the PHY
93 * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
94 * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
95 * mode2 is tied high so nothing to do
98 * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
101 * save three current mux modes and set each to gpio mode
103 saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
104 saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
105 saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
107 writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
108 writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
109 writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
112 * set each to 1 and make each an output
114 val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12);
115 writel(val, &gpio3->gpio_dr);
116 val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12);
117 writel(val, &gpio3->gpio_dir);
119 mdelay(22); /* this value came from RedBoot */
124 val = readl(&gpio4->gpio_dr) | 1 << 7;
125 writel(val, &gpio4->gpio_dr);
126 writel(val, &gpio4->gpio_dr);
133 writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
134 writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
135 writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
138 #define tx25_fec_init()
143 #ifdef CONFIG_MXC_UART
144 extern void mx25_uart1_init_pins(void);
146 mx25_uart1_init_pins();
148 /* board id for linux */
149 gd->bd->bi_arch_number = MACH_TYPE_TX25;
150 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
154 int board_late_init(void)
162 /* dram_init must store complete ramsize in gd->ram_size */
163 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
168 void dram_init_banksize(void)
170 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
171 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
173 #if CONFIG_NR_DRAM_BANKS > 1
174 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
175 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
184 printf("KARO TX25\n");