2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * Based on imx27lite.c:
6 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
7 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
9 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/imx25-pinmux.h>
33 static void mdelay(int n)
39 DECLARE_GLOBAL_DATA_PTR;
42 void tx25_fec_init(void)
44 struct iomuxc_mux_ctl *muxctl;
45 struct iomuxc_pad_ctl *padctl;
47 u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
48 struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE;
49 struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE;
50 u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
52 debug("tx25_fec_init\n");
54 * fec pin init is generic
59 * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
61 * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
62 * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
64 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
65 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
67 writel(gpio_mux_mode, &muxctl->pad_d13);
68 writel(gpio_mux_mode, &muxctl->pad_d11);
70 writel(0x0, &padctl->pad_d13);
71 writel(0x0, &padctl->pad_d11);
73 /* drop PHY power and assert reset (low) */
74 val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9));
75 writel(val, &gpio4->gpio_dr);
76 val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9);
77 writel(val, &gpio4->gpio_dir);
81 debug("resetting phy\n");
83 /* turn on PHY power leaving reset asserted */
84 val = readl(&gpio4->gpio_dr) | 1 << 9;
85 writel(val, &gpio4->gpio_dr);
90 * Setup some strapping pins that are latched by the PHY
94 * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
95 * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
96 * mode2 is tied high so nothing to do
99 * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
102 * save three current mux modes and set each to gpio mode
104 saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
105 saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
106 saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
108 writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
109 writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
110 writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
113 * set each to 1 and make each an output
115 val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12);
116 writel(val, &gpio3->gpio_dr);
117 val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12);
118 writel(val, &gpio3->gpio_dir);
120 mdelay(22); /* this value came from RedBoot */
125 val = readl(&gpio4->gpio_dr) | 1 << 7;
126 writel(val, &gpio4->gpio_dr);
127 writel(val, &gpio4->gpio_dr);
134 writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
135 writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
136 writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
139 #define tx25_fec_init()
144 #ifdef CONFIG_MXC_UART
145 extern void mx25_uart1_init_pins(void);
147 mx25_uart1_init_pins();
149 /* board id for linux */
150 gd->bd->bi_arch_number = MACH_TYPE_TX25;
151 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
155 int board_late_init(void)
163 /* dram_init must store complete ramsize in gd->ram_size */
164 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
169 void dram_init_banksize(void)
171 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
172 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
174 #if CONFIG_NR_DRAM_BANKS > 1
175 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
176 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
185 printf("KARO TX25\n");