3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
11 #ifndef __KEYMILE_COMMON_H
12 #define __KEYMILE_COMMON_H
14 #define WRG_RESET 0x80
15 #define H_OPORTS_14 0x40
19 #define OPRTL_XBUFENA 0x20
21 #define H_OPORTS_SCC4_ENA 0x10
22 #define H_OPORTS_SCC4_FD_ENA 0x04
23 #define H_OPORTS_FCC1_PW_DWN 0x01
25 #define PIGGY_PRESENT 0x80
32 unsigned char res1[3];
39 unsigned char res2[2];
41 unsigned char res3[0xfff0];
43 unsigned char pgy_rev;
44 unsigned char pgy_outputs;
45 unsigned char pgy_eth;
48 #define BFTICU_DIPSWITCH_MASK 0x0f
52 * BFTICU is used on mgcoge and mgocge3ne
55 u8 xi_ena; /* General defect enable */
115 u8 led_on; /* Leds */
117 u8 sfp_control; /* SFP modules */
119 u8 alarm_control; /* Alarm output */
121 u8 icps; /* ICN clock pulse shaping */
122 u8 mswitch; /* Read mode switch */
127 #if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET)
128 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0
131 int ethernet_present(void);
132 int ivm_read_eeprom(void);
134 int trigger_fpga_config(void);
135 int wait_for_fpga_config(void);
136 int fpga_reset(void);
137 int toggle_eeprom_spi_bus(void);
139 int set_km_env(void);
140 int fdt_set_node_and_value(void *blob,
145 int fdt_get_node_and_value(void *blob,
150 #define DELAY_ABORT_SEQ 62 /* @200kHz 9 clocks = 44us, 62us is ok */
151 #define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000))
153 int i2c_soft_read_pin(void);
154 int i2c_make_abort(void);
155 #endif /* __KEYMILE_COMMON_H */