3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
10 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
37 #include <asm/arch/kirkwood.h>
38 #include <asm/arch/mpp.h>
40 #include "../common/common.h"
42 DECLARE_GLOBAL_DATA_PTR;
45 extern I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
47 /* Multi-Purpose Pins Functionality configuration */
48 u32 kwmpp_config[] = {
57 #if defined(CONFIG_SOFT_I2C)
61 #if defined(CONFIG_HARD_I2C)
67 MPP12_GPO, /* Reserved */
70 MPP15_GPIO, /* Not used */
71 MPP16_GPIO, /* Not used */
72 MPP17_GPIO, /* Reserved */
89 MPP34_GPIO, /* CDL1 (input) */
90 MPP35_GPIO, /* CDL2 (input) */
91 MPP36_GPIO, /* MAIN_IRQ (input) */
92 MPP37_GPIO, /* BOARD_LED */
93 MPP38_GPIO, /* Piggy3 LED[1] */
94 MPP39_GPIO, /* Piggy3 LED[2] */
95 MPP40_GPIO, /* Piggy3 LED[3] */
96 MPP41_GPIO, /* Piggy3 LED[4] */
97 MPP42_GPIO, /* Piggy3 LED[5] */
98 MPP43_GPIO, /* Piggy3 LED[6] */
99 MPP44_GPIO, /* Piggy3 LED[7] */
100 MPP45_GPIO, /* Piggy3 LED[8] */
101 MPP46_GPIO, /* Reserved */
102 MPP47_GPIO, /* Reserved */
103 MPP48_GPIO, /* Reserved */
104 MPP49_GPIO, /* SW_INTOUTn */
108 int ethernet_present(void)
113 if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
114 printf ("%s: Error reading Boco\n", __FUNCTION__);
117 if ((buf & 0x40) == 0x40) {
123 int misc_init_r(void)
125 I2C_MUX_DEVICE *i2cdev;
129 /* add I2C Bus for I/O Expander */
130 i2cdev = i2c_mux_ident_muxstring((uchar *)"pca9554a:70:a");
131 io_dev = i2cdev->busid;
133 if (ethernet_present() == 0)
137 str = getenv("mach_type");
139 mach_type = simple_strtoul(str, NULL, 10);
140 printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
141 gd->bd->bi_arch_number = mach_type;
150 kirkwood_mpp_conf(kwmpp_config);
153 * The FLASH_GPIO_PIN switches between using a
154 * NAND or a SPI FLASH. Set this pin on start
157 tmp = readl(KW_GPIO0_BASE);
158 writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
159 tmp = readl(KW_GPIO0_BASE + 4);
160 writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
161 printf("KM: setting NAND mode\n");
164 * arch number of board
166 gd->bd->bi_arch_number = MACH_TYPE_SUEN3;
168 /* address of boot parameters */
169 gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
171 #if defined(CONFIG_SOFT_I2C)
172 /* init the GPIO for I2C Bitbang driver */
173 kw_gpio_set_valid(SUEN3_SDA_PIN, 1);
174 kw_gpio_set_valid(SUEN3_SCL_PIN, 1);
175 kw_gpio_direction_output(SUEN3_SDA_PIN, 0);
176 kw_gpio_direction_output(SUEN3_SCL_PIN, 0);
178 #if defined(CONFIG_SYS_EEPROM_WREN)
179 kw_gpio_set_valid(SUEN3_ENV_WP, 38);
180 kw_gpio_direction_output(SUEN3_ENV_WP, 1);
185 #if defined(CONFIG_CMD_SF)
186 int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
190 return cmd_usage(cmdtp);
192 if ((strcmp(argv[1], "off") == 0)) {
193 printf("SPI FLASH disabled, NAND enabled\n");
194 /* Multi-Purpose Pins Functionality configuration */
195 kwmpp_config[0] = MPP0_NF_IO2;
196 kwmpp_config[1] = MPP1_NF_IO3;
197 kwmpp_config[2] = MPP2_NF_IO4;
198 kwmpp_config[3] = MPP3_NF_IO5;
200 kirkwood_mpp_conf(kwmpp_config);
201 tmp = readl(KW_GPIO0_BASE);
202 writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
203 } else if ((strcmp(argv[1], "on") == 0)) {
204 printf("SPI FLASH enabled, NAND disabled\n");
205 /* Multi-Purpose Pins Functionality configuration */
206 kwmpp_config[0] = MPP0_SPI_SCn;
207 kwmpp_config[1] = MPP1_SPI_MOSI;
208 kwmpp_config[2] = MPP2_SPI_SCK;
209 kwmpp_config[3] = MPP3_SPI_MISO;
211 kirkwood_mpp_conf(kwmpp_config);
212 tmp = readl(KW_GPIO0_BASE);
213 writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
215 return cmd_usage(cmdtp);
222 spitoggle, 2, 0, do_spi_toggle,
223 "En-/disable SPI FLASH access",
224 "<on|off> - Enable (on) or disable (off) SPI FLASH access\n"
232 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
233 gd->bd->bi_dram[i].start = kw_sdram_bar(i);
234 gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i),
240 /* Configure and enable MV88E1118 PHY */
243 char *name = "egiga0";
245 if (miiphy_set_current_dev(name))
249 miiphy_reset(name, CONFIG_PHY_BASE_ADR);
252 #if defined(CONFIG_HUSH_INIT_VAR)
253 int hush_init_var (void)
260 #if defined(CONFIG_BOOTCOUNT_LIMIT)
261 void bootcount_store (ulong a)
263 volatile ulong *save_addr;
264 volatile ulong size = 0;
266 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
267 size += gd->bd->bi_dram[i].size;
269 save_addr = (ulong*)(size - BOOTCOUNT_ADDR);
270 writel(a, save_addr);
271 writel(BOOTCOUNT_MAGIC, &save_addr[1]);
274 ulong bootcount_load (void)
276 volatile ulong *save_addr;
277 volatile ulong size = 0;
279 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
280 size += gd->bd->bi_dram[i].size;
282 save_addr = (ulong*)(size - BOOTCOUNT_ADDR);
283 if (readl(&save_addr[1]) != BOOTCOUNT_MAGIC)
286 return readl(save_addr);
290 #if defined(CONFIG_SOFT_I2C)
291 void set_sda (int state)
297 void set_scl (int state)
310 return (kw_gpio_get_value(SUEN3_SCL_PIN) ? 1 : 0);
314 #if defined(CONFIG_SYS_EEPROM_WREN)
315 int eeprom_write_enable (unsigned dev_addr, int state)
317 kw_gpio_set_value(SUEN3_ENV_WP, !state);
319 return !kw_gpio_get_value(SUEN3_ENV_WP);