2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../common/kup.h"
16 #define _NOT_USED_ 0xFFFFFFFF
18 const uint sdram_table[] = {
20 * Single Read. (Offset 0 in UPMA RAM)
22 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
23 0x1FF77C47, /* last */
26 * SDRAM Initialization (offset 5 in UPMA RAM)
28 * This is no UPM entry point. The following definition uses
29 * the remaining space to establish an initialization
30 * sequence, which is executed by a RUN command.
33 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */
36 * Burst Read. (Offset 8 in UPMA RAM)
38 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
39 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
40 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
41 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
44 * Single Write. (Offset 18 in UPMA RAM)
46 0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
47 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
50 * Burst Write. (Offset 20 in UPMA RAM)
52 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
53 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
55 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
56 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
59 * Refresh (Offset 30 in UPMA RAM)
61 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
62 0xFFFFFC84, 0xFFFFFC07, /* last */
63 _NOT_USED_, _NOT_USED_,
64 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
67 * Exception. (Offset 3c in UPMA RAM)
69 0x7FFFFC07, /* last */
70 _NOT_USED_, _NOT_USED_, _NOT_USED_,
75 * Check Board Identity:
80 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
81 volatile memctl8xx_t *memctl = &immap->im_memctl;
82 uchar latch, rev, mod;
85 * Init ChipSelect #4 (CAN + HW-Latch)
87 out_be32(&memctl->memc_or4, 0xFFFF8926);
88 out_be32(&memctl->memc_br4, 0x90000401);
90 latch = in_8( (unsigned char *) LATCH_ADDR);
91 rev = (latch & 0xF8) >> 3;
94 printf("Board: KUP4X Rev %d.%d\n", rev, mod);
100 phys_size_t initdram(int board_type)
102 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
103 volatile memctl8xx_t *memctl = &immap->im_memctl;
105 upmconfig(UPMA, (uint *) sdram_table,
106 sizeof (sdram_table) / sizeof (uint));
108 out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR);
110 out_be32(&memctl->memc_mar, 0x00000088);
112 out_be32(&memctl->memc_mamr,
113 CONFIG_SYS_MAMR & (~(MAMR_PTAE))); /* no refresh yet */
117 /* perform SDRAM initializsation sequence */
120 out_be32(&memctl->memc_mcr, 0x80002105);
122 out_be32(&memctl->memc_mcr, 0x80002830); /* execute twice */
124 out_be32(&memctl->memc_mcr, 0x80002106); /* RUN MRS Pattern from loc 6 */
128 out_be32(&memctl->memc_mcr, 0x80004105);
130 out_be32(&memctl->memc_mcr, 0x80004830); /* execute twice */
132 out_be32(&memctl->memc_mcr, 0x80004106); /* RUN MRS Pattern from loc 6 */
136 out_be32(&memctl->memc_mcr, 0x80006105);
138 out_be32(&memctl->memc_mcr, 0x80006830); /* execute twice */
140 out_be32(&memctl->memc_mcr, 0x80006106); /* RUN MRS Pattern from loc 6 */
144 out_be32(&memctl->memc_mcr, 0x8000C105);
146 out_be32(&memctl->memc_mcr, 0x8000C830); /* execute twice */
148 out_be32(&memctl->memc_mcr, 0x8000C106); /* RUN MRS Pattern from loc 6 */
151 setbits_be32(&memctl->memc_mamr, MAMR_PTAE); /* enable refresh */
155 out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR);
157 out_be32(&memctl->memc_or1, 0xFF000A00);
158 out_be32(&memctl->memc_br1, 0x00000081);
159 out_be32(&memctl->memc_or2, 0xFE000A00);
160 out_be32(&memctl->memc_br2, 0x01000081);
161 out_be32(&memctl->memc_or3, 0xFD000A00);
162 out_be32(&memctl->memc_br3, 0x02000081);
163 out_be32(&memctl->memc_or6, 0xFC000A00);
164 out_be32(&memctl->memc_br6, 0x03000081);
167 return (4 * 16 * 1024 * 1024);
170 int misc_init_r(void)
172 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
174 #ifdef CONFIG_IDE_LED
175 /* Configure PA8 as output port */
176 setbits_be16(&immap->im_ioport.iop_padir, PA_8);
177 setbits_be16(&immap->im_ioport.iop_paodr, PA_8);
178 clrbits_be16(&immap->im_ioport.iop_papar, PA_8);
179 setbits_be16(&immap->im_ioport.iop_padat, PA_8); /* turn it off */
181 load_sernum_ethaddr();