3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
7 /* ide.c - ide support functions */
17 #define IT8212_PCI_CpuCONTROL 0x5e
18 #define IT8212_PCI_PciModeCONTROL 0x50
19 #define IT8212_PCI_IdeIoCONFIG 0x40
20 #define IT8212_PCI_IdeBusSkewCONTROL 0x4c
21 #define IT8212_PCI_IdeDrivingCURRENT 0x42
23 extern struct pci_controller hose;
25 int ide_preinit (void)
32 for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
33 ide_bus_offset[l] = -ATA_STATUS;
35 devbusfn = pci_find_device(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0);
37 devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0);
43 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
45 ide_bus_offset[0] = ide_bus_offset32 & 0xfffffffe;
46 ide_bus_offset[0] = pci_hose_bus_to_phys(&hose,
47 ide_bus_offset[0] & 0xfffffffe,
49 if (CONFIG_SYS_IDE_MAXBUS > 1) {
50 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2,
51 (u32 *) &ide_bus_offset[1]);
52 ide_bus_offset[1] &= 0xfffffffe;
53 ide_bus_offset[1] = pci_hose_bus_to_phys(&hose,
54 ide_bus_offset[1] & 0xfffffffe,
59 if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) {
60 pci_write_config_byte(devbusfn, IT8212_PCI_CpuCONTROL, 0x01);
61 pci_write_config_byte(devbusfn, IT8212_PCI_PciModeCONTROL, 0x00);
62 pci_write_config_word(devbusfn, PCI_COMMAND, 0x0047);
63 #ifdef CONFIG_IT8212_SECONDARY_ENABLE
64 pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0xA0F3);
66 pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0x8031);
68 pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204);
69 /* __LS_COMMENT__ BUFFALO changed 2004.11.10 changed for EMI */
70 pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */
71 /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */
72 /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */
73 /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */
74 /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */
75 pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00);
81 void ide_set_reset (int flag) {
85 #endif /* CONFIG_CMD_IDE */