3 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/clock.h>
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/sys_proto.h>
15 DECLARE_GLOBAL_DATA_PTR;
19 /* dram_init must store complete ramsize in gd->ram_size */
20 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
25 int board_early_init_f(void)
28 static const struct mxc_weimcs cs0 = {
29 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
30 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 15, 0, 0, 3),
31 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
32 CSCR_L(10, 0, 3, 3, 0, 1, 5, 0, 0, 0, 0, 1),
33 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
34 CSCR_A(0, 0, 2, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0)
37 /* CS4: Network Controller */
38 static const struct mxc_weimcs cs4 = {
39 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
40 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 28, 1, 7, 6),
41 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
42 CSCR_L(4, 4, 4, 10, 4, 0, 5, 4, 0, 0, 0, 1),
43 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
44 CSCR_A(4, 4, 4, 4, 0, 1, 4, 3, 0, 0, 0, 0, 1, 0)
47 mxc_setup_weimcs(0, &cs0);
48 mxc_setup_weimcs(4, &cs4);
50 /* setup pins for UART1 */
51 mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
52 mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
53 mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
54 mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
57 mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
58 mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
59 mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
60 mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
61 mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
62 mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
63 mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
65 /* start SPI2 clock */
66 __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
73 gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
80 printf("Board: i.MX31 Litekit\n");
84 int board_eth_init(bd_t *bis)
88 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);