3 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/arch/clock.h>
28 #include <asm/arch/imx-regs.h>
29 #include <asm/arch/sys_proto.h>
31 DECLARE_GLOBAL_DATA_PTR;
35 /* dram_init must store complete ramsize in gd->ram_size */
36 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
41 int board_early_init_f(void)
44 static const struct mxc_weimcs cs0 = {
45 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
46 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 15, 0, 0, 3),
47 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
48 CSCR_L(10, 0, 3, 3, 0, 1, 5, 0, 0, 0, 0, 1),
49 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
50 CSCR_A(0, 0, 2, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0)
53 /* CS4: Network Controller */
54 static const struct mxc_weimcs cs4 = {
55 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
56 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 28, 1, 7, 6),
57 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
58 CSCR_L(4, 4, 4, 10, 4, 0, 5, 4, 0, 0, 0, 1),
59 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
60 CSCR_A(4, 4, 4, 4, 0, 1, 4, 3, 0, 0, 0, 0, 1, 0)
63 mxc_setup_weimcs(0, &cs0);
64 mxc_setup_weimcs(4, &cs4);
66 /* setup pins for UART1 */
67 mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
68 mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
69 mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
70 mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
73 mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
74 mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
75 mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
76 mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
77 mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
78 mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
79 mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
81 /* start SPI2 clock */
82 __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
89 gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
96 printf("Board: i.MX31 Litekit\n");
100 int board_eth_init(bd_t *bis)
103 #ifdef CONFIG_SMC911X
104 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);