3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com.
7 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
9 * SPDX-License-Identifier: GPL-2.0+
19 #define fpga_debug(fmt, args...) printf("%s: "fmt, __func__, ##args)
21 #define fpga_debug(fmt, args...)
24 Altera_CYC2_Passive_Serial_fns altera_fns = {
34 Altera_desc cyclone2 = {
42 DECLARE_GLOBAL_DATA_PTR;
44 int mvbc_p_init_fpga(void)
46 fpga_debug("Initialize FPGA interface\n");
48 fpga_add(fpga_altera, &cyclone2);
49 fpga_config_fn(0, 1, 0);
55 int fpga_null_fn(int cookie)
60 int fpga_config_fn(int assert, int flush, int cookie)
62 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
63 u32 dvo = gpio->simple_dvo;
65 fpga_debug("SET config : %s\n", assert ? "low" : "high");
72 gpio->simple_dvo = dvo;
77 int fpga_done_fn(int cookie)
79 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
83 fpga_debug("CONF_DONE check ... ");
84 if (gpio->simple_ival & FPGA_CONF_DONE) {
93 int fpga_status_fn(int cookie)
95 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
98 fpga_debug("STATUS check ... ");
99 if (gpio->sint_ival & FPGA_STATUS) {
100 fpga_debug("high\n");
108 int fpga_clk_fn(int assert_clk, int flush, int cookie)
110 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
111 u32 dvo = gpio->simple_dvo;
113 fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low");
120 gpio->simple_dvo = dvo;
125 static inline int _write_fpga(u8 val)
128 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
129 u32 dvo = gpio->simple_dvo;
131 for (i=0; i<8; i++) {
133 gpio->simple_dvo = dvo;
137 gpio->simple_dvo = dvo;
139 gpio->simple_dvo = dvo;
146 int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie)
148 unsigned char *data = (unsigned char *) buf;
151 fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
152 for (i = 0; i < len; i++)
153 _write_fpga(data[i]);