2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * Copyright (C) 2006 Micronas GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/mipsregs.h>
28 #if defined(CONFIG_VCT_PREMIUM)
29 #define BOARD_NAME "PremiumD"
30 #elif defined(CONFIG_VCT_PLATINUM)
31 #define BOARD_NAME "PlatinumD"
32 #elif defined(CONFIG_VCT_PLATINUMAVC)
33 #define BOARD_NAME "PlatinumAVC"
35 #error "vct: No board variant defined!"
38 #if defined(CONFIG_VCT_ONENAND)
39 #define BOARD_NAME_ADD " OneNAND"
41 #define BOARD_NAME_ADD " NOR"
44 int board_early_init_f(void)
47 * First initialize the PIN mulitplexing
49 vct_pin_mux_initialize();
52 * Init the EBI very early so that FLASH can be accessed
59 void _machine_restart(void)
61 reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
62 reg_write(WDT_TORR(WDT_BASE), 0x00);
63 reg_write(WDT_CR(WDT_BASE), 0x1D);
66 * Now wait for the watchdog to trigger the reset
72 * SDRAM is already configured by the bootstrap code, only return the
73 * auto-detected size here
75 phys_size_t initdram(int board_type)
77 return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
78 CONFIG_SYS_MBYTES_SDRAM << 20);
83 u32 config0 = read_c0_prid();
84 char *s = getenv("serial#");
86 if ((config0 & 0xff0000) == PRID_COMP_LEGACY
87 && (config0 & 0xff00) == PRID_IMP_LX4280) {
88 puts("Board: MDED \n");
89 printf("CPU: LX4280 id: 0x%02x, rev: 0x%02x\n",
90 (config0 >> 8) & 0xFF, config0 & 0xFF);
91 } else if ((config0 & 0xff0000) == PRID_COMP_MIPS
92 && (config0 & 0xff00) == PRID_IMP_VGC) {
93 u32 jedec_id = *((u32 *) 0xBEBC71A0);
94 if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
95 puts("Board: VGCA \n");
96 } else if ((((jedec_id) >> 12) & 0xFF) == 0x48
97 || (((jedec_id) >> 12) & 0xFF) == 0x49) {
98 puts("Board: VGCB \n");
100 printf("CPU: MIPS 4K id: 0x%02x, rev: 0x%02x\n",
101 (config0 >> 8) & 0xFF, config0 & 0xFF);
102 } else if (config0 == 0x19378) {
103 printf("CPU: MIPS 24K id: 0x%02x, rev: 0x%02x\n",
104 (config0 >> 8) & 0xFF, config0 & 0xFF);
106 printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
110 printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);
120 int board_eth_init(bd_t *bis)
123 #ifdef CONFIG_SMC911X
124 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);