2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * Copyright (C) 2006 Micronas GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/mipsregs.h>
27 #if defined(CONFIG_VCT_PREMIUM)
28 #define BOARD_NAME "PremiumD"
29 #elif defined(CONFIG_VCT_PLATINUM)
30 #define BOARD_NAME "PlatinumD"
31 #elif defined(CONFIG_VCT_PLATINUMAVC)
32 #define BOARD_NAME "PlatinumAVC"
34 #error "vct: No board variant defined!"
37 #if defined(CONFIG_VCT_ONENAND)
38 #define BOARD_NAME_ADD " OneNAND"
40 #define BOARD_NAME_ADD " NOR"
43 int board_early_init_f(void)
46 * First initialize the PIN mulitplexing
48 vct_pin_mux_initialize();
51 * Init the EBI very early so that FLASH can be accessed
58 void _machine_restart(void)
60 reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
61 reg_write(WDT_TORR(WDT_BASE), 0x00);
62 reg_write(WDT_CR(WDT_BASE), 0x1D);
65 * Now wait for the watchdog to trigger the reset
71 * SDRAM is already configured by the bootstrap code, only return the
72 * auto-detected size here
74 phys_size_t initdram(int board_type)
76 return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
77 CONFIG_SYS_MBYTES_SDRAM << 20);
82 u32 config0 = read_c0_prid();
83 char *s = getenv("serial#");
85 if ((config0 & 0xff0000) == PRID_COMP_LEGACY
86 && (config0 & 0xff00) == PRID_IMP_LX4280) {
87 puts("Board: MDED \n");
88 printf("CPU: LX4280 id: 0x%02x, rev: 0x%02x\n",
89 (config0 >> 8) & 0xFF, config0 & 0xFF);
90 } else if ((config0 & 0xff0000) == PRID_COMP_MIPS
91 && (config0 & 0xff00) == PRID_IMP_VGC) {
92 u32 jedec_id = *((u32 *) 0xBEBC71A0);
93 if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
94 puts("Board: VGCA \n");
95 } else if ((((jedec_id) >> 12) & 0xFF) == 0x48
96 || (((jedec_id) >> 12) & 0xFF) == 0x49) {
97 puts("Board: VGCB \n");
99 printf("CPU: MIPS 4K id: 0x%02x, rev: 0x%02x\n",
100 (config0 >> 8) & 0xFF, config0 & 0xFF);
101 } else if (config0 == 0x19378) {
102 printf("CPU: MIPS 24K id: 0x%02x, rev: 0x%02x\n",
103 (config0 >> 8) & 0xFF, config0 & 0xFF);
105 printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
109 printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);