2 * Copyright (C) 2008 Miromico AG
4 * Mostly copied form atmel ATNGW100 sources
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/sdram.h>
30 #include <asm/arch/clk.h>
31 #include <asm/arch/hmatrix.h>
32 #include <asm/arch/hardware.h>
33 #include <asm/arch/mmu.h>
34 #include <asm/arch/portmux.h>
36 DECLARE_GLOBAL_DATA_PTR;
38 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
40 .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
41 .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
42 .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
45 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
46 .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
47 .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
48 | MMU_VMR_CACHE_WRBACK,
52 static const struct sdram_config sdram_config = {
53 .data_bits = SDRAM_DATA_32BIT,
65 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
69 int board_eth_init(bd_t *bis)
71 return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0,
76 int board_early_init_f(void)
78 /* Enable SDRAM in the EBI mux */
79 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
81 portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH);
82 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
84 #if defined(CONFIG_MACB)
85 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
87 #if defined(CONFIG_MMC)
88 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
93 phys_size_t initdram(int board_type)
95 unsigned long expected_size;
96 unsigned long actual_size;
99 sdram_base = uncached(EBI_SDRAM_BASE);
101 expected_size = sdram_init(sdram_base, &sdram_config);
102 actual_size = get_ram_size(sdram_base, expected_size);
104 if (expected_size != actual_size)
105 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
106 actual_size >> 20, expected_size >> 20);
111 int board_early_init_r(void)
113 gd->bd->bi_phy_id[0] = 0x01;
117 int board_postclk_init(void)
119 /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
120 gclk_enable_output(3, PORTMUX_DRIVE_LOW);
121 gclk_set_rate(3, GCLK_PARENT_OSC0, 25000000);