3 * Denis Peter, MPL AG Switzerland
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/processor.h>
29 #include <stdio_dev.h>
31 #include "piix4_pci.h"
39 #define PRINTF(fmt,args...) printf (fmt ,##args)
41 #define PRINTF(fmt,args...)
44 #if defined(CONFIG_PIP405)
46 extern int drv_isa_kbd_init (void);
48 /* fdc (logical device 0) */
49 const SIO_LOGDEV_TABLE sio_fdc[] = {
50 {0x60, 3}, /* set IO to FDPort (3F0) */
51 {0x61, 0xF0}, /* set IO to FDPort (3F0) */
52 {0x70, 06}, /* set IRQ 6 for FDPort */
53 {0x74, 02}, /* set DMA 2 for FDPort */
54 {0xF0, 0x05}, /* set to PS2 type */
55 {0xF1, 0x00}, /* default value */
56 {0x30, 1}, /* and activate the device */
57 {0xFF, 0} /* end of device table */
59 /* paralell port (logical device 3) */
60 const SIO_LOGDEV_TABLE sio_pport[] = {
61 {0x60, 3}, /* set IO to PPort (378) */
62 {0x61, 0x78}, /* set IO to PPort (378) */
63 {0x70, 07}, /* set IRQ 7 for PPort */
64 {0xF1, 00}, /* set PPort to normal */
65 {0x30, 1}, /* and activate the device */
66 {0xFF, 0} /* end of device table */
68 /* paralell port (logical device 3) Floppy assigned to lpt */
69 const SIO_LOGDEV_TABLE sio_pport_fdc[] = {
70 {0x60, 3}, /* set IO to PPort (378) */
71 {0x61, 0x78}, /* set IO to PPort (378) */
72 {0x70, 07}, /* set IRQ 7 for PPort */
73 {0xF1, 02}, /* set PPort to Floppy */
74 {0x30, 1}, /* and activate the device */
75 {0xFF, 0} /* end of device table */
77 /* uart 1 (logical device 4) */
78 const SIO_LOGDEV_TABLE sio_com1[] = {
79 {0x60, 3}, /* set IO to COM1 (3F8) */
80 {0x61, 0xF8}, /* set IO to COM1 (3F8) */
81 {0x70, 04}, /* set IRQ 4 for COM1 */
82 {0x30, 1}, /* and activate the device */
83 {0xFF, 0} /* end of device table */
85 /* uart 2 (logical device 5) */
86 const SIO_LOGDEV_TABLE sio_com2[] = {
87 {0x60, 2}, /* set IO to COM2 (2F8) */
88 {0x61, 0xF8}, /* set IO to COM2 (2F8) */
89 {0x70, 03}, /* set IRQ 3 for COM2 */
90 {0x30, 1}, /* and activate the device */
91 {0xFF, 0} /* end of device table */
94 /* keyboard controller (logical device 7) */
95 const SIO_LOGDEV_TABLE sio_keyboard[] = {
96 {0x70, 1}, /* set IRQ 1 for keyboard */
97 {0x72, 12}, /* set IRQ 12 for mouse */
98 {0xF0, 0}, /* disable Port92 (this is a PowerPC!!) */
99 {0x30, 1}, /* and activate the device */
100 {0xFF, 0} /* end of device table */
104 /*******************************************************************************
105 * Config SuperIO FDC37C672
106 ********************************************************************************/
107 unsigned char open_cfg_super_IO(int address)
109 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
110 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
111 if(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
117 void close_cfg_super_IO(int address)
119 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
123 unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)
125 /* assuming config reg is open */
126 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
127 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
128 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
129 return in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1);
132 void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data)
134 /* assuming config reg is open */
135 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
136 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
137 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
138 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
141 void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)
143 while (ldt->index != 0xFF) {
144 write_cfg_super_IO(SIO_CFG_PORT, ldev, ldt->index, ldt->val);
149 void isa_sio_loadtable(void)
151 char *s = getenv("floppy");
152 /* setup Floppy device 0*/
153 isa_write_table((SIO_LOGDEV_TABLE *)&sio_fdc,0);
154 /* setup parallel port device 3 */
155 if(s && !strncmp(s, "lpt", 3)) {
156 printf("SIO: Floppy assigned to LPT\n");
157 /* floppy is assigned to the LPT */
158 isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport_fdc,3);
161 /*printf("Floppy assigned to internal port\n");*/
162 isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport,3);
164 /* setup Com1 port device 4 */
165 isa_write_table((SIO_LOGDEV_TABLE *)&sio_com1,4);
166 /* setup Com2 port device 5 */
167 isa_write_table((SIO_LOGDEV_TABLE *)&sio_com2,5);
168 /* setup keyboards device 7 */
169 isa_write_table((SIO_LOGDEV_TABLE *)&sio_keyboard,7);
173 void isa_sio_setup(void)
175 if (open_cfg_super_IO(SIO_CFG_PORT) == true)
178 close_cfg_super_IO(0x3F0);
183 /******************************************************************************
185 * we use the Vector mode
188 struct isa_irq_action {
189 interrupt_handler_t *handler;
194 static struct isa_irq_action isa_irqs[16];
198 * This contains the irq mask for both 8259A irq controllers,
200 static unsigned int cached_irq_mask = 0xfff9;
202 #define cached_imr1 (unsigned char)cached_irq_mask
203 #define cached_imr2 (unsigned char)(cached_irq_mask>>8)
204 #define IMR_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
205 #define IMR_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
206 #define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
207 #define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
208 #define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
209 #define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
210 #define ICW3_1 ICW2_1
211 #define ICW3_2 ICW2_2
212 #define ICW4_1 ICW2_1
213 #define ICW4_2 ICW2_2
218 void disable_8259A_irq(unsigned int irq)
220 unsigned int mask = 1 << irq;
222 cached_irq_mask |= mask;
224 out8(IMR_2,cached_imr2);
226 out8(IMR_1,cached_imr1);
229 void enable_8259A_irq(unsigned int irq)
231 unsigned int mask = ~(1 << irq);
233 cached_irq_mask &= mask;
235 out8(IMR_2,cached_imr2);
237 out8(IMR_1,cached_imr1);
240 int i8259A_irq_pending(unsigned int irq)
242 unsigned int mask = 1<<irq;
246 ret = inb(0x20) & mask;
248 ret = inb(0xA0) & (mask >> 8);
249 spin_unlock_irqrestore(&i8259A_lock, flags);
256 * This function assumes to be called rarely. Switching between
257 * 8259A registers is slow.
259 int i8259A_irq_real(unsigned int irq)
262 int irqmask = 1<<irq;
265 out8(ISR_1,0x0B); /* ISR register */
266 value = in8(ISR_1) & irqmask;
267 out8(ISR_1,0x0A); /* back to the IRR register */
270 out8(ISR_2,0x0B); /* ISR register */
271 value = in8(ISR_2) & (irqmask >> 8);
272 out8(ISR_2,0x0A); /* back to the IRR register */
277 * Careful! The 8259A is a fragile beast, it pretty
278 * much _has_ to be done exactly like this (mask it
279 * first, _then_ send the EOI, and the order of EOI
280 * to the two 8259s is important!
282 void mask_and_ack_8259A(unsigned int irq)
284 unsigned int irqmask = 1 << irq;
285 unsigned int temp_irqmask = cached_irq_mask;
287 * Lightweight spurious IRQ detection. We do not want
288 * to overdo spurious IRQ handling - it's usually a sign
289 * of hardware problems, so we only do the checks we can
290 * do without slowing down good hardware unnecesserily.
292 * Note that IRQ7 and IRQ15 (the two spurious IRQs
293 * usually resulting from the 8259A-1|2 PICs) occur
294 * even if the IRQ is masked in the 8259A. Thus we
295 * can check spurious 8259A IRQs without doing the
296 * quite slow i8259A_irq_real() call for every IRQ.
297 * This does not cover 100% of spurious interrupts,
298 * but should be enough to warn the user that there
299 * is something bad going on ...
301 if (temp_irqmask & irqmask)
302 goto spurious_8259A_irq;
303 temp_irqmask |= irqmask;
307 in8(IMR_2); /* DUMMY - (do we need this?) */
308 out8(IMR_2,(unsigned char)(temp_irqmask>>8));
309 out8(ISR_2,0x60+(irq&7));/* 'Specific EOI' to slave */
310 out8(ISR_1,0x62); /* 'Specific EOI' to master-IRQ2 */
311 out8(IMR_2,cached_imr2); /* turn it on again */
313 in8(IMR_1); /* DUMMY - (do we need this?) */
314 out8(IMR_1,(unsigned char)temp_irqmask);
315 out8(ISR_1,0x60+irq); /* 'Specific EOI' to master */
316 out8(IMR_1,cached_imr1); /* turn it on again */
323 * this is the slow path - should happen rarely.
325 if (i8259A_irq_real(irq))
327 * oops, the IRQ _is_ in service according to the
328 * 8259A - not spurious, go handle it.
330 goto handle_real_irq;
333 static int spurious_irq_mask;
335 * At this point we can be sure the IRQ is spurious,
336 * lets ACK and report it. [once per IRQ]
338 if (!(spurious_irq_mask & irqmask)) {
339 PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq);
340 spurious_irq_mask |= irqmask;
342 /* irq_err_count++; */
344 * Theoretically we do not have to handle this IRQ,
345 * but in Linux this does not cause problems and is
348 goto handle_real_irq;
352 void init_8259A(void)
354 out8(IMR_1,0xff); /* mask all of 8259A-1 */
355 out8(IMR_2,0xff); /* mask all of 8259A-2 */
357 out8(ICW1_1,0x11); /* ICW1: select 8259A-1 init */
358 out8(ICW2_1,0x20 + 0); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
359 out8(ICW3_1,0x04); /* 8259A-1 (the master) has a slave on IR2 */
360 out8(ICW4_1,0x01); /* master expects normal EOI */
361 out8(ICW1_2,0x11); /* ICW2: select 8259A-2 init */
362 out8(ICW2_2,0x20 + 8); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
363 out8(ICW3_2,0x02); /* 8259A-2 is a slave on master's IR2 */
364 out8(ICW4_2,0x01); /* (slave's support for AEOI in flat mode
365 is to be investigated) */
366 udelay(10000); /* wait for 8259A to initialize */
367 out8(IMR_1,cached_imr1); /* restore master IRQ mask */
368 udelay(10000); /* wait for 8259A to initialize */
369 out8(IMR_2,cached_imr2); /* restore slave IRQ mask */
373 #define PCI_INT_ACK_ADDR 0xEED00000
375 int handle_isa_int(void)
377 unsigned long irqack;
379 /* first we acknokledge the int via the PCI bus */
380 irqack=in32(PCI_INT_ACK_ADDR);
381 /* now we get the ISRs */
384 irq=(unsigned char)irqack;
386 /* if((irq==7)&&((isr1&0x80)==0)) {
387 PRINTF("IRQ7 detected but not in ISR\n");
390 */ /* we should handle cascaded interrupts here also */
392 /* printf("ISA Irq %d\n",irq); */
393 isa_irqs[irq].count++;
394 if(irq!=2) { /* just swallow the cascade irq 2 */
395 if (isa_irqs[irq].handler != NULL)
396 (*isa_irqs[irq].handler)(isa_irqs[irq].arg); /* call isr */
398 PRINTF ("bogus interrupt vector 0x%x\n", irq);
402 /* issue EOI instruction to clear the IRQ */
403 mask_and_ack_8259A(irq);
408 /******************************************************************
409 * Install and free an ISA interrupt handler.
412 void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
414 if (isa_irqs[vec].handler != NULL) {
415 printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n",
416 vec, (uint)handler, (uint)isa_irqs[vec].handler);
418 isa_irqs[vec].handler = handler;
419 isa_irqs[vec].arg = arg;
420 enable_8259A_irq(vec);
421 PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask);
425 void isa_irq_free_handler(int vec)
427 disable_8259A_irq(vec);
428 isa_irqs[vec].handler = NULL;
429 isa_irqs[vec].arg = NULL;
430 PRINTF ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask);
434 /****************************************************************************/
435 void isa_init_irq_contr(void)
438 /* disable all Interrupts */
439 /* first write icws controller 1 */
442 isa_irqs[i].handler=NULL;
443 isa_irqs[i].arg=NULL;
449 /*************************************************************************/
451 void isa_show_irq(void)
455 printf ("\nISA Interrupt-Information:\n");
456 printf ("Nr Routine Arg Count\n");
458 for (vec=0; vec<16; vec++) {
459 if (isa_irqs[vec].handler != NULL) {
460 printf ("%02d %08lx %08lx %d\n",
462 (ulong)isa_irqs[vec].handler,
463 (ulong)isa_irqs[vec].arg,
464 isa_irqs[vec].count);
469 int isa_irq_get_count(int vec)
471 return(isa_irqs[vec].count);
474 /******************************************************************
475 * Init the ISA bus and devices.
478 #if defined(CONFIG_PIP405)
483 isa_init_irq_contr();