3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/s3c24x0_cpu.h>
31 #include <stdio_dev.h>
35 #include "../common/common_util.h"
37 DECLARE_GLOBAL_DATA_PTR;
41 #if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
45 #elif FCLK_SPEED==1 /* Fout = 202.8MHz */
63 static inline void delay(unsigned long loops)
65 __asm__ volatile ("1:\n"
67 "bne 1b":"=r" (loops):"0" (loops));
71 * Miscellaneous platform dependent initialisations
76 struct s3c24x0_clock_power * const clk_power =
77 s3c24x0_get_base_clock_power();
78 struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
80 /* to reduce PLL lock time, adjust the LOCKTIME register */
81 clk_power->LOCKTIME = 0xFFFFFF;
84 clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
86 /* some delay between MPLL and UPLL */
90 clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
92 /* some delay between MPLL and UPLL */
95 /* set up the I/O ports */
96 gpio->GPACON = 0x007FFFFF;
97 gpio->GPBCON = 0x002AAAAA;
98 gpio->GPBUP = 0x000002BF;
99 gpio->GPCCON = 0xAAAAAAAA;
100 gpio->GPCUP = 0x0000FFFF;
101 gpio->GPDCON = 0xAAAAAAAA;
102 gpio->GPDUP = 0x0000FFFF;
103 gpio->GPECON = 0xAAAAAAAA;
104 gpio->GPEUP = 0x000037F7;
105 gpio->GPFCON = 0x00000000;
106 gpio->GPFUP = 0x00000000;
107 gpio->GPGCON = 0xFFEAFF5A;
108 gpio->GPGUP = 0x0000F0DC;
109 gpio->GPHCON = 0x0028AAAA;
110 gpio->GPHUP = 0x00000656;
112 /* setup correct IRQ modes for NIC */
113 gpio->EXTINT2 = (gpio->EXTINT2 & ~(7<<8)) | (4<<8); /* rising edge mode */
115 /* select USB port 2 to be host or device (fix to host for now) */
116 gpio->MISCCR |= 0x08;
119 gd->baudrate = CONFIG_BAUDRATE;
120 gd->have_console = 1;
123 /* arch number of VCMA9-Board */
124 gd->bd->bi_arch_number = MACH_TYPE_MPL_VCMA9;
126 /* adress of boot parameters */
127 gd->bd->bi_boot_params = 0x30000100;
136 * NAND flash initialization.
138 #if defined(CONFIG_CMD_NAND)
140 nand_probe(ulong physadr);
143 static inline void NF_Reset(void)
148 NF_Cmd(0xFF); /* reset command */
149 for(i = 0; i < 10; i++); /* tWB = 100ns. */
150 NF_WaitRB(); /* wait 200~500us; */
155 static inline void NF_Init(void)
157 #if 0 /* a little bit too optimistic */
167 NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0));
168 /*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */
169 /* 1 1 1 1, 1 xxx, r xxx, r xxx */
170 /* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */
178 struct s3c2410_nand * const nand = s3c2410_get_base_nand();
182 printf("NAND flash probing at 0x%.8lX\n", (ulong)nand);
184 printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
189 * Get some Board/PLD Info
192 static u8 Get_PLD_ID(void)
194 VCMA9_PLD * const pld = VCMA9_get_base_PLD();
199 static u8 Get_PLD_BOARD(void)
201 VCMA9_PLD * const pld = VCMA9_get_base_PLD();
206 static u8 Get_PLD_SDRAM(void)
208 VCMA9_PLD * const pld = VCMA9_get_base_PLD();
213 static u8 Get_PLD_Version(void)
215 return((Get_PLD_ID() >> 4) & 0x0F);
218 static u8 Get_PLD_Revision(void)
220 return(Get_PLD_ID() & 0x0F);
224 static int Get_Board_Config(void)
226 u8 config = Get_PLD_BOARD() & 0x03;
235 static uchar Get_Board_PCB(void)
237 return(((Get_PLD_BOARD() >> 4) & 0x03) + 'A');
240 static u8 Get_SDRAM_ChipNr(void)
242 switch ((Get_PLD_SDRAM() >> 4) & 0x0F) {
250 static ulong Get_SDRAM_ChipSize(void)
252 switch (Get_PLD_SDRAM() & 0x0F) {
253 case 0: return 16 * (1024*1024);
254 case 1: return 32 * (1024*1024);
255 case 2: return 8 * (1024*1024);
256 case 3: return 8 * (1024*1024);
260 static const char * Get_SDRAM_ChipGeom(void)
262 switch (Get_PLD_SDRAM() & 0x0F) {
263 case 0: return "4Mx8x4";
264 case 1: return "8Mx8x4";
265 case 2: return "2Mx8x4";
266 case 3: return "4Mx8x2";
267 default: return "unknown";
271 static void Show_VCMA9_Info(char *board_name, char *serial)
273 printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n",
274 board_name, serial, Get_Board_PCB(), Get_PLD_Version(), Get_PLD_Revision());
275 printf("SDRAM: %d chips %s\n", Get_SDRAM_ChipNr(), Get_SDRAM_ChipGeom());
280 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
281 gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr();
286 /* ------------------------------------------------------------------------- */
289 * Check Board Identity:
296 backup_t *b = (backup_t *) s;
298 i = getenv_r("serial#", s, 32);
299 if ((i < 0) || strncmp (s, "VCMA9", 5)) {
300 get_backup_values (b);
301 if (strncmp (b->signature, "MPL\0", 4) != 0) {
302 puts ("### No HW ID - assuming VCMA9");
304 b->serial_name[5] = 0;
305 Show_VCMA9_Info(b->serial_name, &b->serial_name[6]);
309 Show_VCMA9_Info(s, &s[6]);
316 int last_stage_init(void)
319 stdio_print_current_devices();
324 /***************************************************************************
325 * some helping routines
327 #if !CONFIG_USB_KEYBOARD
328 int overwrite_console(void)
330 /* return TRUE if console should be overwritten */
335 /************************************************************************
337 ************************************************************************/
338 void print_vcma9_info(void)
343 if ((i = getenv_r("serial#", s, 32)) < 0) {
344 puts ("### No HW ID - assuming VCMA9");
345 printf("i %d", i*24);
348 Show_VCMA9_Info(s, &s[6]);
352 #ifdef CONFIG_CMD_NET
353 int board_eth_init(bd_t *bis)
357 rc = cs8900_initialize(0, CONFIG_CS8900_BASE);