git.sur5r.net Git - u-boot/blob - board/ms7720se/lowlevel_init.S

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2007
   4  * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
   5  */
   6
   7 #include <asm/macro.h>
   8
   9         .global lowlevel_init
  10
  11         .text
  12         .align  2
  13
  14 lowlevel_init:
  15
  16         write16 WTCSR_A, WTCSR_D
  17
  18         write16 WTCNT_A, WTCNT_D
  19
  20         write16 FRQCR_A, FRQCR_D
  21
  22         write16 UCLKCR_A, UCLKCR_D
  23
  24         write32 CMNCR_A, CMNCR_D
  25
  26         write32 CMNCR_A, CMNCR_D
  27
  28         write32 CS0BCR_A, CS0BCR_D
  29
  30         write32 CS2BCR_A, CS2BCR_D
  31
  32         write32 CS3BCR_A, CS3BCR_D
  33
  34         write32 CS4BCR_A, CS4BCR_D
  35
  36         write32 CS5ABCR_A, CS5ABCR_D
  37
  38         write32 CS5BBCR_A, CS5BBCR_D
  39
  40         write32 CS6ABCR_A, CS6ABCR_D
  41
  42         write32 CS6BBCR_A, CS6BBCR_D
  43
  44         write32 CS0WCR_A, CS0WCR_D
  45
  46         write32 CS2WCR_A, CS2WCR_D
  47
  48         write32 CS3WCR_A, CS3WCR_D
  49
  50         write32 CS4WCR_A, CS4WCR_D
  51
  52         write32 CS5AWCR_A, CS5AWCR_D
  53
  54         write32 CS5BWCR_A, CS5BWCR_D
  55
  56         write32 CS6AWCR_A, CS6AWCR_D
  57
  58         write32 CS6BWCR_A, CS6BWCR_D
  59
  60         write32 SDCR_A, SDCR_D1
  61
  62         write32 RTCSR_A, RTCSR_D
  63
  64         write32 RTCNT_A RTCNT_D
  65
  66         write32 RTCOR_A, RTCOR_D
  67
  68         write32 SDCR_A, SDCR_D2
  69
  70         write16 SDMR3_A, SDMR3_D
  71
  72         write16 PCCR_A, PCCR_D
  73
  74         write16 PDCR_A, PDCR_D
  75
  76         write16 PECR_A, PECR_D
  77
  78         write16 PGCR_A, PGCR_D
  79
  80         write16 PHCR_A, PHCR_D
  81
  82         write16 PPCR_A, PPCR_D
  83
  84         write16 PTCR_A, PTCR_D
  85
  86         write16 PVCR_A, PVCR_D
  87
  88         write16 PSELA_A, PSELA_D
  89
  90         write32 CCR_A, CCR_D
  91
  92         write8  LED_A, LED_D
  93
  94         rts
  95          nop
  96
  97         .align 4
  98
  99 FRQCR_A:        .long   0xA415FF80      /* FRQCR Address */
 100 WTCNT_A:        .long   0xA415FF84
 101 WTCSR_A:        .long   0xA415FF86
 102 UCLKCR_A:       .long   0xA40A0008
 103 FRQCR_D:        .word   0x1103          /* I:B:P=8:4:2 */
 104 WTCNT_D:        .word   0x5A00
 105 WTCSR_D:        .word   0xA506
 106 UCLKCR_D:       .word   0xA5C0
 107
 108 #define BSC_BASE        0xA4FD0000
 109 CMNCR_A:        .long   BSC_BASE
 110 CS0BCR_A:       .long   BSC_BASE + 0x04
 111 CS2BCR_A:       .long   BSC_BASE + 0x08
 112 CS3BCR_A:       .long   BSC_BASE + 0x0C
 113 CS4BCR_A:       .long   BSC_BASE + 0x10
 114 CS5ABCR_A:      .long   BSC_BASE + 0x14
 115 CS5BBCR_A:      .long   BSC_BASE + 0x18
 116 CS6ABCR_A:      .long   BSC_BASE + 0x1C
 117 CS6BBCR_A:      .long   BSC_BASE + 0x20
 118 CS0WCR_A:       .long   BSC_BASE + 0x24
 119 CS2WCR_A:       .long   BSC_BASE + 0x28
 120 CS3WCR_A:       .long   BSC_BASE + 0x2C
 121 CS4WCR_A:       .long   BSC_BASE + 0x30
 122 CS5AWCR_A:      .long   BSC_BASE + 0x34
 123 CS5BWCR_A:      .long   BSC_BASE + 0x38
 124 CS6AWCR_A:      .long   BSC_BASE + 0x3C
 125 CS6BWCR_A:      .long   BSC_BASE + 0x40
 126 SDCR_A:         .long   BSC_BASE + 0x44
 127 RTCSR_A:        .long   BSC_BASE + 0x48
 128 RTCNT_A:        .long   BSC_BASE + 0x4C
 129 RTCOR_A:        .long   BSC_BASE + 0x50
 130 SDMR3_A:        .long   BSC_BASE + 0x58C0
 131
 132 CMNCR_D:        .long   0x00000010
 133 CS0BCR_D:       .long   0x36DB0400
 134 CS2BCR_D:       .long   0x36DB0400
 135 CS3BCR_D:       .long   0x36DB4600
 136 CS4BCR_D:       .long   0x36DB0400
 137 CS5ABCR_D:      .long   0x36DB0400
 138 CS5BBCR_D:      .long   0x36DB0200
 139 CS6ABCR_D:      .long   0x36DB0400
 140 CS6BBCR_D:      .long   0x36DB0400
 141 CS0WCR_D:       .long   0x00000B01
 142 CS2WCR_D:       .long   0x00000500
 143 CS3WCR_D:       .long   0x00006D1B
 144 CS4WCR_D:       .long   0x00000500
 145 CS5AWCR_D:      .long   0x00000500
 146 CS5BWCR_D:      .long   0x00000500
 147 CS6AWCR_D:      .long   0x00000500
 148 CS6BWCR_D:      .long   0x00000500
 149 SDCR_D1:        .long   0x00000011
 150 RTCSR_D:        .long   0xA55A0010
 151 RTCNT_D:        .long   0xA55A001F
 152 RTCOR_D:        .long   0xA55A001F
 153 SDMR3_D:        .word   0x0000
 154 .align 2
 155 SDCR_D2:        .long   0x00000811
 156
 157 #define PFC_BASE        0xA4050100
 158 PCCR_A:         .long   PFC_BASE + 0x04
 159 PDCR_A:         .long   PFC_BASE + 0x06
 160 PECR_A:         .long   PFC_BASE + 0x08
 161 PGCR_A:         .long   PFC_BASE + 0x0C
 162 PHCR_A:         .long   PFC_BASE + 0x0E
 163 PPCR_A:         .long   PFC_BASE + 0x18
 164 PTCR_A:         .long   PFC_BASE + 0x1E
 165 PVCR_A:         .long   PFC_BASE + 0x22
 166 PSELA_A:        .long   PFC_BASE + 0x24
 167
 168 PCCR_D:         .word   0x0000
 169 PDCR_D:         .word   0x0000
 170 PECR_D:         .word   0x0000
 171 PGCR_D:         .word   0x0000
 172 PHCR_D:         .word   0x0000
 173 PPCR_D:         .word   0x00AA
 174 PTCR_D:         .word   0x0280
 175 PVCR_D:         .word   0x0000
 176 PSELA_D:        .word   0x0000
 177 .align 2
 178
 179 CCR_A:          .long   0xFFFFFFEC
 180 !CCR_D:         .long   0x0000000D
 181 CCR_D:          .long   0x0000000B
 182
 183 LED_A:          .long   0xB6800000
 184 LED_D:          .long   0xFF