3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 #include "mt48lc16m16a2-75.h"
14 #ifndef CONFIG_SYS_RAMBOOT
15 static void sdram_start (int hi_addr)
17 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
19 /* unlock mode register */
20 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
21 __asm__ volatile ("sync");
23 /* precharge all banks */
24 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
25 __asm__ volatile ("sync");
28 /* set mode register: extended mode */
29 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
30 __asm__ volatile ("sync");
32 /* set mode register: reset DLL */
33 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
34 __asm__ volatile ("sync");
37 /* precharge all banks */
38 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
39 __asm__ volatile ("sync");
42 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
43 __asm__ volatile ("sync");
45 /* set mode register */
46 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
47 __asm__ volatile ("sync");
49 /* normal operation */
50 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
51 __asm__ volatile ("sync");
56 * ATTENTION: Although partially referenced initdram does NOT make real use
57 * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
58 * is something else than 0x00000000.
61 phys_size_t initdram (int board_type)
65 #ifndef CONFIG_SYS_RAMBOOT
68 /* setup SDRAM chip selects */
69 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */
70 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */
71 __asm__ volatile ("sync");
73 /* setup config registers */
74 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
75 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
76 __asm__ volatile ("sync");
78 #if SDRAM_DDR && SDRAM_TAPDELAY
80 *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
81 __asm__ volatile ("sync");
84 /* find RAM size using SDRAM CS0 only */
86 test1 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
88 test2 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
96 /* memory smaller than 1MB is impossible */
97 if (dramsize < (1 << 20)) {
101 /* set SDRAM CS0 size according to the amount of RAM found */
103 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
105 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
108 #else /* CONFIG_SYS_RAMBOOT */
110 /* retrieve size of memory connected to SDRAM CS0 */
111 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
112 if (dramsize >= 0x13) {
113 dramsize = (1 << (dramsize - 0x13)) << 20;
118 /* retrieve size of memory connected to SDRAM CS1 */
119 dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
120 if (dramsize2 >= 0x13) {
121 dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
126 #endif /* CONFIG_SYS_RAMBOOT */
128 return dramsize + dramsize2;
131 int checkboard (void)
133 puts ("Board: MUNICes\n");
138 static struct pci_controller hose;
140 extern void pci_mpc5xxx_init(struct pci_controller *);
142 void pci_init_board(void)
144 pci_mpc5xxx_init(&hose);
148 #ifdef CONFIG_OF_BOARD_SETUP
149 int ft_board_setup(void *blob, bd_t *bd)
151 ft_cpu_setup(blob, bd);
155 #endif /* CONFIG_OF_BOARD_SETUP */