3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
9 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 DECLARE_GLOBAL_DATA_PTR;
37 #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
38 #define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
39 OR_SCY_2_CLK | OR_EHTR | OR_BI)
42 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
44 #if defined(CFG_ENV_IS_IN_FLASH)
46 # define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
49 # define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
51 # ifndef CFG_ENV_SECT_SIZE
52 # define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
56 /*-----------------------------------------------------------------------
59 #define FLAG_PROTECT_SET 0x01
60 #define FLAG_PROTECT_CLEAR 0x02
62 /* Board support for 1 or 2 flash devices */
63 #undef FLASH_PORT_WIDTH32
64 #undef FLASH_PORT_WIDTH16
65 #define FLASH_PORT_WIDTH8
67 #ifdef FLASH_PORT_WIDTH16
68 #define FLASH_PORT_WIDTH ushort
69 #define FLASH_PORT_WIDTHV vu_short
70 #elif FLASH_PORT_WIDTH32
71 #define FLASH_PORT_WIDTH ulong
72 #define FLASH_PORT_WIDTHV vu_long
73 #else /* FLASH_PORT_WIDTH8 */
74 #define FLASH_PORT_WIDTH uchar
75 #define FLASH_PORT_WIDTHV vu_char
78 #define FPW FLASH_PORT_WIDTH
79 #define FPWV FLASH_PORT_WIDTHV
81 /*-----------------------------------------------------------------------
84 static ulong flash_get_size (FPWV * addr, flash_info_t * info);
85 static int write_data (flash_info_t * info, ulong dest, FPW data);
86 static void flash_get_offsets (ulong base, flash_info_t * info);
88 /*-----------------------------------------------------------------------
91 unsigned long flash_init (void)
93 volatile immap_t *immap = (immap_t *) CFG_IMMR;
94 volatile memctl8xx_t *memctl = &immap->im_memctl;
95 unsigned long size_b0;
97 #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
98 int scy, trlx, flash_or_timing, clk_diff;
100 scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
101 if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
107 /* We assume that each 10MHz of bus clock require 1-clk SCY
110 clk_diff = (gd->bus_clk / 1000000) - 50;
112 /* We need proper rounding here. This is what the "+5" and "-5"
116 scy += (clk_diff + 5) / 10;
118 scy += (clk_diff - 5) / 10;
120 /* For bus frequencies above 50MHz, we want to use relaxed
123 if (gd->bus_clk >= 50000000)
136 flash_or_timing = (scy << 4) | trlx |
137 (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
140 /* Init: no FLASHes known */
141 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
142 flash_info[i].flash_id = FLASH_UNKNOWN;
145 /* Static FLASH Bank configuration here - FIXME XXX */
146 size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);
148 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
149 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
150 size_b0, size_b0 << 20);
153 /* Remap FLASH according to real size */
154 #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
155 memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
157 memctl->memc_or0 = flash_or_timing | (-size_b0 & OR_AM_MSK);
159 memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_8 | BR_MS_GPCM | BR_V;
161 /* Re-do sizing to get full correct info */
162 size_b0 = flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[0]);
164 flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
166 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
167 /* monitor protection ON by default */
168 (void) flash_protect (FLAG_PROTECT_SET,
170 CFG_MONITOR_BASE + monitor_flash_len - 1,
174 #ifdef CFG_ENV_IS_IN_FLASH
175 /* ENV protection ON by default */
176 flash_protect (FLAG_PROTECT_SET,
178 CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
182 flash_info[0].size = size_b0;
187 /*-----------------------------------------------------------------------
189 static void flash_get_offsets (ulong base, flash_info_t * info)
193 if (info->flash_id == FLASH_UNKNOWN) {
197 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
198 for (i = 0; i < info->sector_count; i++) {
199 info->start[i] = base + (i * 0x00020000);
204 /*-----------------------------------------------------------------------
206 void flash_print_info (flash_info_t * info)
210 if (info->flash_id == FLASH_UNKNOWN) {
211 printf ("missing or unknown FLASH type\n");
215 switch (info->flash_id & FLASH_VENDMASK) {
216 case FLASH_MAN_INTEL:
220 printf ("Unknown Vendor ");
224 switch (info->flash_id & FLASH_TYPEMASK) {
225 case FLASH_28F320J3A:
226 printf ("28F320J3A\n");
228 case FLASH_28F640J3A:
229 printf ("28F640J3A\n");
231 case FLASH_28F128J3A:
232 printf ("28F128J3A\n");
235 printf ("Unknown Chip Type\n");
239 printf (" Size: %ld MB in %d Sectors\n",
240 info->size >> 20, info->sector_count);
242 printf (" Sector Start Addresses:");
243 for (i = 0; i < info->sector_count; ++i) {
248 info->protect[i] ? " (RO)" : " ");
254 /*-----------------------------------------------------------------------
258 /*-----------------------------------------------------------------------
262 * The following code cannot be run from FLASH!
265 static ulong flash_get_size (FPWV * addr, flash_info_t * info)
269 addr[0] = (FPW) 0x00900090;
273 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
276 case (FPW) INTEL_MANUFACT:
277 info->flash_id = FLASH_MAN_INTEL;
280 info->flash_id = FLASH_UNKNOWN;
281 info->sector_count = 0;
283 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
284 return (0); /* no or unknown flash */
287 #ifdef FLASH_PORT_WIDTH8
288 value = addr[2]; /* device ID */
290 value = addr[1]; /* device ID */
293 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
296 case (FPW) INTEL_ID_28F320J3A:
297 info->flash_id += FLASH_28F320J3A;
298 info->sector_count = 32;
299 info->size = 0x00400000;
302 case (FPW) INTEL_ID_28F640J3A:
303 info->flash_id += FLASH_28F640J3A;
304 info->sector_count = 64;
305 info->size = 0x00800000;
308 case (FPW) INTEL_ID_28F128J3A:
309 info->flash_id += FLASH_28F128J3A;
310 info->sector_count = 128;
311 info->size = 0x01000000;
312 break; /* => 16 MB */
315 info->flash_id = FLASH_UNKNOWN;
319 if (info->sector_count > CFG_MAX_FLASH_SECT) {
320 printf ("** ERROR: sector count %d > max (%d) **\n",
321 info->sector_count, CFG_MAX_FLASH_SECT);
322 info->sector_count = CFG_MAX_FLASH_SECT;
325 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
331 /*-----------------------------------------------------------------------
334 int flash_erase (flash_info_t * info, int s_first, int s_last)
336 int flag, prot, sect;
337 ulong type, start, now, last;
340 if ((s_first < 0) || (s_first > s_last)) {
341 if (info->flash_id == FLASH_UNKNOWN) {
342 printf ("- missing\n");
344 printf ("- no sectors to erase\n");
349 type = (info->flash_id & FLASH_VENDMASK);
350 if ((type != FLASH_MAN_INTEL)) {
351 printf ("Can't erase unknown flash type %08lx - aborted\n",
357 for (sect = s_first; sect <= s_last; ++sect) {
358 if (info->protect[sect]) {
364 printf ("- Warning: %d protected sectors will not be erased!\n",
370 start = get_timer (0);
372 /* Start erase on unprotected sectors */
373 for (sect = s_first; sect <= s_last; sect++) {
374 if (info->protect[sect] == 0) { /* not protected */
375 FPWV *addr = (FPWV *) (info->start[sect]);
378 /* Disable interrupts which might cause a timeout here */
379 flag = disable_interrupts ();
381 *addr = (FPW) 0x00500050; /* clear status register */
382 *addr = (FPW) 0x00200020; /* erase setup */
383 *addr = (FPW) 0x00D000D0; /* erase confirm */
385 /* re-enable interrupts if necessary */
387 enable_interrupts ();
389 /* wait at least 80us - let's wait 1 ms */
392 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
393 if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
394 printf ("Timeout\n");
395 *addr = (FPW) 0x00B000B0; /* suspend erase */
396 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
401 /* show that we're waiting */
402 if ((now - last) > 1000) { /* every second */
408 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
415 /*-----------------------------------------------------------------------
416 * Copy memory to flash, returns:
419 * 2 - Flash not erased
420 * 4 - Flash not identified
423 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
428 int i, l, rc, port_width;
430 if (info->flash_id == FLASH_UNKNOWN) {
433 /* get lower word aligned address */
434 #ifdef FLASH_PORT_WIDTH16
437 #elif defined(FLASH_PORT_WIDTH32)
446 * handle unaligned start bytes
448 if ((l = addr - wp) != 0) {
450 for (i = 0, cp = wp; i < l; ++i, ++cp) {
451 data = (data << 8) | (*(uchar *) cp);
453 for (; i < port_width && cnt > 0; ++i) {
454 data = (data << 8) | *src++;
458 for (; cnt == 0 && i < port_width; ++i, ++cp) {
459 data = (data << 8) | (*(uchar *) cp);
462 if ((rc = write_data (info, wp, data)) != 0) {
469 * handle word aligned part
471 while (cnt >= port_width) {
473 for (i = 0; i < port_width; ++i) {
474 data = (data << 8) | *src++;
476 if ((rc = write_data (info, wp, data)) != 0) {
488 * handle unaligned tail bytes
491 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
492 data = (data << 8) | *src++;
495 for (; i < port_width; ++i, ++cp) {
496 data = (data << 8) | (*(uchar *) cp);
499 return (write_data (info, wp, data));
502 /*-----------------------------------------------------------------------
503 * Write a word or halfword to Flash, returns:
506 * 2 - Flash not erased
508 static int write_data (flash_info_t * info, ulong dest, FPW data)
510 FPWV *addr = (FPWV *) dest;
515 /* Check if Flash is (sufficiently) erased */
516 if ((*addr & data) != data) {
517 printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
520 /* Disable interrupts which might cause a timeout here */
521 flag = disable_interrupts ();
523 *addr = (FPW) 0x00400040; /* write setup */
526 /* re-enable interrupts if necessary */
528 enable_interrupts ();
530 start = get_timer (0);
532 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
533 if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
534 *addr = (FPW) 0x00FF00FF; /* restore read mode */
539 *addr = (FPW) 0x00FF00FF; /* restore read mode */