2 *(C) Copyright 2005-2008 Netstal Maschinen AG
3 * Niklaus Giger (Niklaus.Giger@netstal.com)
5 * This source code is free software; you can redistribute it
6 * and/or modify it in source code form under the terms of the GNU
7 * General Public License as published by the Free Software
8 * Foundation; either version 2 of the License, or (at your option)
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
23 #include <asm/processor.h>
27 void show_sdram_registers(void)
31 printf("SDRAM Controller Registers --\n");
32 mfsdram(mem_mcopt1, value);
33 printf(" SDRAM0_CFG : 0x%08x\n", value);
34 mfsdram(mem_status, value);
35 printf(" SDRAM0_STATUS: 0x%08x\n", value);
36 mfsdram(mem_mb0cf, value);
37 printf(" SDRAM0_B0CR : 0x%08x\n", value);
38 mfsdram(mem_mb1cf, value);
39 printf(" SDRAM0_B1CR : 0x%08x\n", value);
40 mfsdram(mem_sdtr1, value);
41 printf(" SDRAM0_TR : 0x%08x\n", value);
42 mfsdram(mem_rtr, value);
43 printf(" SDRAM0_RTR : 0x%08x\n", value);
47 long int fixed_hcu4_sdram (unsigned int dram_size)
52 /* disable memory controller */
53 mtsdram(mem_mcopt1, 0x00000000);
57 /* Clear SDRAM0_BESR0 (Bus Error Syndrome Register) */
58 mtsdram(mem_besra, 0xffffffff);
60 /* Clear SDRAM0_BESR1 (Bus Error Syndrome Register) */
61 mtsdram(mem_besrb, 0xffffffff);
63 /* Clear SDRAM0_ECCCFG (disable ECC) */
64 mtsdram(mem_ecccf, 0x00000000);
66 /* Clear SDRAM0_ECCESR (ECC Error Syndrome Register) */
67 mtsdram(mem_eccerr, 0xffffffff);
69 /* Timing register: CASL=2, PTA=2, CTP=2, LDF=1, RFTA=5, RCD=2
71 mtsdram(mem_sdtr1, 0x008a4015);
73 /* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1
76 switch (dram_size >> 20) {
78 mtsdram(mem_mb0cf, 0x00062001);
79 mtsdram(mem_rtr, 0x07F00000);
82 mtsdram(mem_mb0cf, 0x00084001);
83 mtsdram(mem_rtr, 0x04100000);
86 mtsdram(mem_mb0cf, 0x000A4001);
87 mtsdram(mem_rtr, 0x04100000);
90 printf("Invalid memory size of %d MB given\n", dram_size >> 20);
93 /* Power management idle timer set to the default. */
94 mtsdram(mem_pmit, 0x07c00000);
98 /* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) TODO */
99 mtsdram(mem_mcopt1, 0x90800000);
102 printf("%s: done\n", __FUNCTION__);