2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/pinmux.h>
27 #include "pinmux-config-cardhu.h"
29 #include <asm/arch/clock.h>
30 #include <asm/arch/gp_padctrl.h>
31 #include <asm/arch/pmu.h>
32 #include <asm/arch/sdmmc.h>
33 #include <asm/arch-tegra/mmc.h>
34 #include <asm/arch-tegra/tegra_mmc.h>
39 * Routine: pinmux_init
40 * Description: Do individual peripheral pinmux configs
42 void pinmux_init(void)
44 pinmux_config_table(tegra3_pinmux_common,
45 ARRAY_SIZE(tegra3_pinmux_common));
47 pinmux_config_table(unused_pins_lowpower,
48 ARRAY_SIZE(unused_pins_lowpower));
51 #if defined(CONFIG_MMC)
53 * Routine: pin_mux_mmc
54 * Description: setup the pin muxes/tristate values for the SDMMC(s)
56 static void pin_mux_mmc(void)
60 /* Do I2C/PMU writes to bring up SD card bus power */
61 static void board_sdmmc_voltage_init(void)
63 uchar reg, data_buffer[1];
66 i2c_set_bus_num(0); /* PMU is on bus 0 */
68 data_buffer[0] = 0x65;
71 for (i = 0; i < MAX_I2C_RETRY; ++i) {
72 if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
76 data_buffer[0] = 0x09;
79 for (i = 0; i < MAX_I2C_RETRY; ++i) {
80 if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
85 static void pad_init_mmc(struct tegra_mmc *reg)
87 struct apb_misc_gp_ctlr *const gpc =
88 (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE;
89 struct sdmmc_ctlr *const sdmmc = (struct sdmmc_ctlr *)reg;
90 u32 val, offset = (unsigned int)reg;
93 debug("%s: sdmmc address = %08x\n", __func__, (unsigned int)sdmmc);
95 /* Set the pad drive strength for SDMMC1 or 3 only */
96 if (offset != TEGRA_SDMMC1_BASE && offset != TEGRA_SDMMC3_BASE) {
97 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
102 /* Set pads as per T30 TRM, section 24.6.1.2 */
103 padcfg = (GP_SDIOCFG_DRVUP_SLWF | GP_SDIOCFG_DRVDN_SLWR | \
104 GP_SDIOCFG_DRVUP | GP_SDIOCFG_DRVDN);
105 padmask = 0x00000FFF;
106 if (offset == TEGRA_SDMMC1_BASE) {
107 val = readl(&gpc->sdio1cfg);
110 writel(val, &gpc->sdio1cfg);
111 } else { /* SDMMC3 */
112 val = readl(&gpc->sdio3cfg);
115 writel(val, &gpc->sdio3cfg);
118 val = readl(&sdmmc->sdmmc_sdmemcomp_pad_ctrl);
120 val |= MEMCOMP_PADCTRL_VREF;
121 writel(val, &sdmmc->sdmmc_sdmemcomp_pad_ctrl);
123 val = readl(&sdmmc->sdmmc_auto_cal_config);
125 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
126 writel(val, &sdmmc->sdmmc_auto_cal_config);
129 /* this is a weak define that we are overriding */
130 int board_mmc_init(bd_t *bd)
132 debug("board_mmc_init called\n");
134 /* Turn on SD-card bus power */
135 board_sdmmc_voltage_init();
137 /* Set up the SDMMC pads as per the TRM */
138 pad_init_mmc((struct tegra_mmc *)TEGRA_SDMMC1_BASE);
140 /* Enable muxes, etc. for SDMMC controllers */
143 /* init dev 0 (SDMMC4), ("HSMMC") with 8-bit bus */
144 tegra_mmc_init(0, 8, -1, -1);
146 /* init dev 1 (SDMMC0), ("SDIO") with 8-bit bus */
147 tegra_mmc_init(1, 8, -1, -1);