2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef _PINMUX_CONFIG_DALMORE_H_
18 #define _PINMUX_CONFIG_DALMORE_H_
20 #define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
22 .pingrp = PINGRP_##_pingrp, \
23 .func = PMUX_FUNC_##_mux, \
24 .pull = PMUX_PULL_##_pull, \
25 .tristate = PMUX_TRI_##_tri, \
26 .io = PMUX_PIN_##_io, \
27 .lock = PMUX_PIN_LOCK_DEFAULT, \
28 .od = PMUX_PIN_OD_DEFAULT, \
29 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
32 #define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
34 .pingrp = PINGRP_##_pingrp, \
35 .func = PMUX_FUNC_##_mux, \
36 .pull = PMUX_PULL_##_pull, \
37 .tristate = PMUX_TRI_##_tri, \
38 .io = PMUX_PIN_##_io, \
39 .lock = PMUX_PIN_LOCK_##_lock, \
40 .od = PMUX_PIN_OD_##_od, \
41 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
44 #define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
46 .pingrp = PINGRP_##_pingrp, \
47 .func = PMUX_FUNC_##_mux, \
48 .pull = PMUX_PULL_##_pull, \
49 .tristate = PMUX_TRI_##_tri, \
50 .io = PMUX_PIN_##_io, \
51 .lock = PMUX_PIN_LOCK_##_lock, \
52 .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
53 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
56 #define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
58 .pingrp = PINGRP_##_pingrp, \
59 .func = PMUX_FUNC_##_mux, \
60 .pull = PMUX_PULL_##_pull, \
61 .tristate = PMUX_TRI_##_tri, \
62 .io = PMUX_PIN_##_io, \
63 .lock = PMUX_PIN_LOCK_##_lock, \
64 .od = PMUX_PIN_OD_DEFAULT, \
65 .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
68 #define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
70 .pingrp = PINGRP_##_pingrp, \
71 .func = PMUX_FUNC_##_mux, \
72 .pull = PMUX_PULL_##_pull, \
73 .tristate = PMUX_TRI_##_tri, \
74 .io = PMUX_PIN_##_io, \
75 .lock = PMUX_PIN_LOCK_##_lock, \
76 .od = PMUX_PIN_OD_##_od, \
77 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
80 #define USB_PINMUX CEC_PINMUX
82 #define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
84 .drvgrp = PDRIVE_PINGROUP_##_drvgrp, \
89 .lpmd = PMUX_LPMD_##_lpmd, \
90 .schmt = PMUX_SCHMT_##_schmt, \
91 .hsm = PMUX_HSM_##_hsm, \
94 static struct pmux_pingrp_config tegra114_pinmux_common[] = {
95 /* EXTPERIPH1 pinmux */
96 DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, OUTPUT),
99 DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, TRISTATE, INPUT),
100 DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT),
101 DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT),
102 DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT),
105 DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, TRISTATE, INPUT),
106 DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT),
107 DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT),
108 DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT),
111 DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT),
112 DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT),
113 DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT),
114 DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT),
117 DEFAULT_PINMUX(DVFS_PWM, CLDVFS, NORMAL, NORMAL, OUTPUT),
118 DEFAULT_PINMUX(DVFS_CLK, CLDVFS, NORMAL, NORMAL, OUTPUT),
121 DEFAULT_PINMUX(ULPI_CLK, ULPI, NORMAL, NORMAL, INPUT),
122 DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, INPUT),
123 DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, INPUT),
124 DEFAULT_PINMUX(ULPI_DATA2, ULPI, NORMAL, NORMAL, INPUT),
125 DEFAULT_PINMUX(ULPI_DATA3, ULPI, NORMAL, NORMAL, INPUT),
126 DEFAULT_PINMUX(ULPI_DATA4, ULPI, NORMAL, NORMAL, INPUT),
127 DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, NORMAL, INPUT),
128 DEFAULT_PINMUX(ULPI_DATA6, ULPI, NORMAL, NORMAL, INPUT),
129 DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, NORMAL, INPUT),
130 DEFAULT_PINMUX(ULPI_DIR, ULPI, NORMAL, TRISTATE, INPUT),
131 DEFAULT_PINMUX(ULPI_NXT, ULPI, NORMAL, TRISTATE, INPUT),
132 DEFAULT_PINMUX(ULPI_STP, ULPI, NORMAL, NORMAL, OUTPUT),
135 I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
136 I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
139 VI_PINMUX(CAM_MCLK, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
142 VI_PINMUX(GPIO_PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
145 VI_PINMUX(GPIO_PBB4, VGP4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
148 I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
149 I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
152 DEFAULT_PINMUX(GMI_A16, UARTD, NORMAL, NORMAL, OUTPUT),
153 DEFAULT_PINMUX(GMI_A17, UARTD, NORMAL, TRISTATE, INPUT),
154 DEFAULT_PINMUX(GMI_A18, UARTD, NORMAL, TRISTATE, INPUT),
155 DEFAULT_PINMUX(GMI_A19, UARTD, NORMAL, NORMAL, OUTPUT),
158 DEFAULT_PINMUX(GMI_AD5, SPI4, NORMAL, NORMAL, INPUT),
159 DEFAULT_PINMUX(GMI_AD6, SPI4, UP, NORMAL, INPUT),
160 DEFAULT_PINMUX(GMI_AD7, SPI4, UP, NORMAL, INPUT),
161 DEFAULT_PINMUX(GMI_AD12, RSVD1, NORMAL, NORMAL, OUTPUT),
162 DEFAULT_PINMUX(GMI_CS6_N, SPI4, NORMAL, NORMAL, INPUT),
163 DEFAULT_PINMUX(GMI_WR_N, SPI4, NORMAL, NORMAL, INPUT),
166 DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT),
169 DEFAULT_PINMUX(GMI_CS1_N, SOC, NORMAL, TRISTATE, INPUT),
170 DEFAULT_PINMUX(GMI_OE_N, SOC, NORMAL, TRISTATE, INPUT),
172 /* EXTPERIPH2 pinmux */
173 DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, OUTPUT),
176 DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
177 DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),
178 DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP, NORMAL, INPUT),
179 DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP, NORMAL, INPUT),
180 DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP, NORMAL, INPUT),
181 DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP, NORMAL, INPUT),
184 DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT),
185 DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, UP, NORMAL, INPUT),
186 DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP, NORMAL, INPUT),
187 DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP, NORMAL, INPUT),
188 DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP, NORMAL, INPUT),
189 DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP, NORMAL, INPUT),
190 DEFAULT_PINMUX(SDMMC3_CLK_LB_IN, SDMMC3, UP, TRISTATE, INPUT),
191 DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3, DOWN, NORMAL, INPUT),
194 DEFAULT_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT),
195 DEFAULT_PINMUX(SDMMC4_CMD, SDMMC4, UP, NORMAL, INPUT),
196 DEFAULT_PINMUX(SDMMC4_DAT0, SDMMC4, UP, NORMAL, INPUT),
197 DEFAULT_PINMUX(SDMMC4_DAT1, SDMMC4, UP, NORMAL, INPUT),
198 DEFAULT_PINMUX(SDMMC4_DAT2, SDMMC4, UP, NORMAL, INPUT),
199 DEFAULT_PINMUX(SDMMC4_DAT3, SDMMC4, UP, NORMAL, INPUT),
200 DEFAULT_PINMUX(SDMMC4_DAT4, SDMMC4, UP, NORMAL, INPUT),
201 DEFAULT_PINMUX(SDMMC4_DAT5, SDMMC4, UP, NORMAL, INPUT),
202 DEFAULT_PINMUX(SDMMC4_DAT6, SDMMC4, UP, NORMAL, INPUT),
203 DEFAULT_PINMUX(SDMMC4_DAT7, SDMMC4, UP, NORMAL, INPUT),
206 DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT),
209 DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT),
210 DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT),
211 DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT),
212 DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT),
213 DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT),
214 DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT),
217 DEFAULT_PINMUX(DAP3_DIN, RSVD1, NORMAL, TRISTATE, OUTPUT),
218 DEFAULT_PINMUX(DAP3_SCLK, RSVD1, NORMAL, TRISTATE, OUTPUT),
219 DEFAULT_PINMUX(GPIO_PV0, RSVD1, NORMAL, TRISTATE, OUTPUT),
220 DEFAULT_PINMUX(KB_ROW7, RSVD1, UP, NORMAL, INPUT),
223 DEFAULT_PINMUX(KB_ROW10, UARTA, NORMAL, TRISTATE, INPUT),
224 DEFAULT_PINMUX(KB_ROW9, UARTA, NORMAL, NORMAL, OUTPUT),
226 /* I2CPWR pinmux (I2C5) */
227 I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
228 I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
231 DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT),
234 DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, INPUT),
237 DEFAULT_PINMUX(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT),
240 DEFAULT_PINMUX(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT),
243 DEFAULT_PINMUX(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT),
246 DEFAULT_PINMUX(PWR_INT_N, PMI, NORMAL, TRISTATE, INPUT),
248 /* RESET_OUT_N pinmux */
249 DEFAULT_PINMUX(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT),
251 /* EXTPERIPH3 pinmux */
252 DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
255 I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
256 I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
259 DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, TRISTATE, INPUT),
260 DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT),
263 DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, TRISTATE, INPUT),
264 DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT),
267 DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, TRISTATE, INPUT),
268 DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT),
269 DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, TRISTATE, INPUT),
270 DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT),
273 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
276 CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
279 DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
280 DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
283 USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
286 DEFAULT_PINMUX(GPIO_X6_AUD, SPI6, UP, TRISTATE, INPUT),
289 static struct pmux_pingrp_config unused_pins_lowpower[] = {
290 DEFAULT_PINMUX(CLK1_REQ, RSVD3, DOWN, TRISTATE, OUTPUT),
291 DEFAULT_PINMUX(USB_VBUS_EN1, RSVD3, DOWN, TRISTATE, OUTPUT),
294 /* Initially setting all used GPIO's to non-TRISTATE */
295 static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {
296 DEFAULT_PINMUX(GPIO_X4_AUD, RSVD1, DOWN, NORMAL, OUTPUT),
297 DEFAULT_PINMUX(GPIO_X5_AUD, RSVD1, UP, NORMAL, INPUT),
298 DEFAULT_PINMUX(GPIO_X6_AUD, RSVD3, UP, NORMAL, INPUT),
299 DEFAULT_PINMUX(GPIO_X7_AUD, RSVD1, DOWN, NORMAL, OUTPUT),
300 DEFAULT_PINMUX(GPIO_W2_AUD, RSVD1, UP, NORMAL, INPUT),
301 DEFAULT_PINMUX(GPIO_W3_AUD, SPI6, UP, NORMAL, INPUT),
302 DEFAULT_PINMUX(GPIO_X1_AUD, RSVD3, DOWN, NORMAL, INPUT),
303 DEFAULT_PINMUX(GPIO_X3_AUD, RSVD3, UP, NORMAL, INPUT),
305 DEFAULT_PINMUX(DAP3_FS, I2S2, DOWN, NORMAL, OUTPUT),
306 DEFAULT_PINMUX(DAP3_DIN, I2S2, DOWN, NORMAL, OUTPUT),
307 DEFAULT_PINMUX(DAP3_DOUT, I2S2, DOWN, NORMAL, OUTPUT),
308 DEFAULT_PINMUX(DAP3_SCLK, I2S2, DOWN, NORMAL, OUTPUT),
309 DEFAULT_PINMUX(GPIO_PV0, RSVD3, NORMAL, NORMAL, INPUT),
310 DEFAULT_PINMUX(GPIO_PV1, RSVD1, NORMAL, NORMAL, INPUT),
312 DEFAULT_PINMUX(GPIO_PBB3, RSVD3, DOWN, NORMAL, OUTPUT),
313 DEFAULT_PINMUX(GPIO_PBB5, RSVD3, DOWN, NORMAL, OUTPUT),
314 DEFAULT_PINMUX(GPIO_PBB6, RSVD3, DOWN, NORMAL, OUTPUT),
315 DEFAULT_PINMUX(GPIO_PBB7, RSVD3, DOWN, NORMAL, OUTPUT),
316 DEFAULT_PINMUX(GPIO_PCC1, RSVD3, DOWN, NORMAL, INPUT),
317 DEFAULT_PINMUX(GPIO_PCC2, RSVD3, DOWN, NORMAL, INPUT),
319 DEFAULT_PINMUX(GMI_AD0, GMI, NORMAL, NORMAL, OUTPUT),
320 DEFAULT_PINMUX(GMI_AD1, GMI, NORMAL, NORMAL, OUTPUT),
321 DEFAULT_PINMUX(GMI_AD10, GMI, DOWN, NORMAL, OUTPUT),
322 DEFAULT_PINMUX(GMI_AD11, GMI, DOWN, NORMAL, OUTPUT),
323 DEFAULT_PINMUX(GMI_AD12, GMI, UP, NORMAL, INPUT),
324 DEFAULT_PINMUX(GMI_AD13, GMI, DOWN, NORMAL, OUTPUT),
325 DEFAULT_PINMUX(GMI_AD2, GMI, NORMAL, NORMAL, INPUT),
326 DEFAULT_PINMUX(GMI_AD3, GMI, NORMAL, NORMAL, INPUT),
327 DEFAULT_PINMUX(GMI_AD8, GMI, DOWN, NORMAL, OUTPUT),
328 DEFAULT_PINMUX(GMI_ADV_N, GMI, UP, NORMAL, INPUT),
329 DEFAULT_PINMUX(GMI_CLK, GMI, DOWN, NORMAL, OUTPUT),
330 DEFAULT_PINMUX(GMI_CS0_N, GMI, UP, NORMAL, INPUT),
331 DEFAULT_PINMUX(GMI_CS2_N, GMI, UP, NORMAL, INPUT),
332 DEFAULT_PINMUX(GMI_CS3_N, GMI, UP, NORMAL, OUTPUT),
333 DEFAULT_PINMUX(GMI_CS4_N, GMI, UP, NORMAL, INPUT),
334 DEFAULT_PINMUX(GMI_CS7_N, GMI, UP, NORMAL, INPUT),
335 DEFAULT_PINMUX(GMI_DQS, GMI, UP, NORMAL, INPUT),
336 DEFAULT_PINMUX(GMI_IORDY, GMI, UP, NORMAL, INPUT),
337 DEFAULT_PINMUX(GMI_WP_N, GMI, UP, NORMAL, INPUT),
339 DEFAULT_PINMUX(SDMMC1_WP_N, SPI4, UP, NORMAL, OUTPUT),
340 DEFAULT_PINMUX(CLK2_REQ, RSVD3, NORMAL, NORMAL, OUTPUT),
342 DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, OUTPUT),
343 DEFAULT_PINMUX(KB_COL4, SDMMC3, UP, NORMAL, INPUT),
344 DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT),
345 DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, OUTPUT),
346 DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, OUTPUT),
347 DEFAULT_PINMUX(KB_ROW3, KBC, DOWN, NORMAL, INPUT),
348 DEFAULT_PINMUX(KB_ROW4, KBC, DOWN, NORMAL, INPUT),
349 DEFAULT_PINMUX(KB_ROW6, KBC, DOWN, NORMAL, INPUT),
350 DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT),
352 DEFAULT_PINMUX(CLK3_REQ, RSVD3, NORMAL, NORMAL, OUTPUT),
353 DEFAULT_PINMUX(GPIO_PU4, RSVD3, NORMAL, NORMAL, OUTPUT),
354 DEFAULT_PINMUX(GPIO_PU5, RSVD3, NORMAL, NORMAL, INPUT),
355 DEFAULT_PINMUX(GPIO_PU6, RSVD3, NORMAL, NORMAL, INPUT),
357 DEFAULT_PINMUX(HDMI_INT, RSVD1, DOWN, NORMAL, INPUT),
359 DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT),
360 DEFAULT_PINMUX(SPDIF_IN, USB, NORMAL, NORMAL, INPUT),
362 DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT),
365 static struct pmux_drvgrp_config dalmore_padctrl[] = {
366 /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
367 DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
368 SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
370 #endif /* PINMUX_CONFIG_COMMON_H */