3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/processor.h>
30 #include <spd_sdram.h>
31 #include <status_led.h>
34 DECLARE_GLOBAL_DATA_PTR;
36 extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
38 unsigned char sha1_checksum[SHA1_SUM_LEN];
40 /* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
41 unsigned char swapbits[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
42 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
44 static void set_leds (int val)
46 out32(GPIO0_OR, (in32 (GPIO0_OR) & ~0x78000000) | (val << 27));
49 #define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
51 void __led_init (led_id_t mask, int state)
55 if (state == STATUS_LED_ON)
62 void __led_set (led_id_t mask, int state)
66 if (state == STATUS_LED_ON)
68 else if (state == STATUS_LED_OFF)
73 void __led_toggle (led_id_t mask)
81 static void status_led_blink (void)
86 /* set all LED which are on, to state BLINKING */
87 for (i = 0; i < 4; i++) {
88 if (val & 0x08) status_led_set (i, STATUS_LED_BLINKING);
93 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
94 void show_boot_progress (int val)
96 /* find all valid Codes for val in README */
97 if (val == -30) return;
99 /* smthing goes wrong */
105 /* validating Image */
106 status_led_set (0, STATUS_LED_OFF);
107 status_led_set (1, STATUS_LED_ON);
108 status_led_set (2, STATUS_LED_ON);
112 status_led_set (0, STATUS_LED_ON);
113 status_led_set (1, STATUS_LED_ON);
114 status_led_set (2, STATUS_LED_ON);
117 /* starting Ethernet configuration */
118 status_led_set (0, STATUS_LED_OFF);
119 status_led_set (1, STATUS_LED_OFF);
120 status_led_set (2, STATUS_LED_ON);
124 status_led_set (0, STATUS_LED_ON);
125 status_led_set (1, STATUS_LED_OFF);
126 status_led_set (2, STATUS_LED_ON);
132 int board_early_init_f(void)
136 set_leds(0); /* display boot info counter */
138 /*--------------------------------------------------------------------
139 * Setup the external bus controller/chip selects
140 *-------------------------------------------------------------------*/
141 mtdcr(ebccfga, xbcfg);
142 reg = mfdcr(ebccfgd);
143 mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */
145 /*--------------------------------------------------------------------
146 * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c
147 * via define from board config file.
148 *-------------------------------------------------------------------*/
150 /*--------------------------------------------------------------------
151 * Setup the interrupt controller polarities, triggers, etc.
152 *-------------------------------------------------------------------*/
153 mtdcr(uic0sr, 0xffffffff); /* clear all */
154 mtdcr(uic0er, 0x00000000); /* disable all */
155 mtdcr(uic0cr, 0x00000001); /* UIC1 crit is critical */
156 mtdcr(uic0pr, 0xfffffe1f); /* per ref-board manual */
157 mtdcr(uic0tr, 0x01c00000); /* per ref-board manual */
158 mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
159 mtdcr(uic0sr, 0xffffffff); /* clear all */
161 mtdcr(uic1sr, 0xffffffff); /* clear all */
162 mtdcr(uic1er, 0x00000000); /* disable all */
163 mtdcr(uic1cr, 0x00000000); /* all non-critical */
164 mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
165 mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
166 mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
167 mtdcr(uic1sr, 0xffffffff); /* clear all */
169 /*--------------------------------------------------------------------
170 * Setup other serial configuration
171 *-------------------------------------------------------------------*/
172 mfsdr(sdr_pci0, reg);
173 mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */
174 mtsdr(sdr_pfc0, 0x00000100); /* Pin function: enable GPIO49-63 */
175 mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins, select IRQ5 */
180 #define EEPROM_LEN 256
181 void load_sernum_ethaddr (void)
184 char buf[EEPROM_LEN];
187 u16 checksumcrc16 = 0;
189 /* read the MACs from EEprom */
190 status_led_set (0, STATUS_LED_ON);
191 status_led_set (1, STATUS_LED_ON);
192 ret = eeprom_read (CFG_I2C_EEPROM_ADDR, 0, (uchar *)buf, EEPROM_LEN);
194 checksumcrc16 = cyg_crc16 ((uchar *)buf, EEPROM_LEN - 2);
195 /* check, if the EEprom is programmed:
196 * - The Prefix(Byte 0,1,2) is equal to "ATR"
197 * - The checksum, stored in the last 2 Bytes, is correct
199 if ((strncmp (buf,"ATR",3) != 0) ||
200 ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
201 ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
202 /* EEprom is not programmed */
203 printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
206 sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
213 setenv ("ethaddr", (char *) mac);
214 sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
221 setenv ("eth1addr", (char *) mac);
226 /* some error reading the EEprom */
227 if ((use_eeprom = getenv ("use_eeprom_ethaddr")) == NULL) {
228 /* dont use bootcmd */
229 setenv("bootdelay", "-1");
232 /* == default ? use standard */
233 if (strncmp (use_eeprom, "default", 7) == 0) {
236 /* Env doesnt exist -> hang */
242 #ifdef CONFIG_PREBOOT
244 static uchar kbd_magic_prefix[] = "key_magic";
245 static uchar kbd_command_prefix[] = "key_cmd";
252 struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
257 /* use the DIPs for some bootoptions */
258 val = getenv (ENV_NAME_DIP);
259 tmp = simple_strtoul (val, NULL, 16);
261 kbd_data->s2 = (tmp & 0x0f);
262 kbd_data->s1 = (tmp & 0xf0) >> 4;
266 static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
270 if (s1 >= '0' && s1 <= '9')
272 else if (s1 >= 'a' && s1 <= 'f')
274 else if (s1 >= 'A' && s1 <= 'F')
279 if (s1 != kbd_data->s1) return -1;
282 if (s1 >= '0' && s1 <= '9')
284 else if (s1 >= 'a' && s1 <= 'f')
286 else if (s1 >= 'A' && s1 <= 'F')
291 if (s1 != kbd_data->s2) return -1;
295 static char *key_match (const struct kbd_data_t *kbd_data)
297 char magic[sizeof (kbd_magic_prefix) + 1];
299 char *kbd_magic_keys;
302 * The following string defines the characters that can be appended
303 * to "key_magic" to form the names of environment variables that
304 * hold "magic" key codes, i. e. such key codes that can cause
305 * pre-boot actions. If the string is empty (""), then only
306 * "key_magic" is checked (old behaviour); the string "125" causes
307 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
309 if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
312 /* loop over all magic keys;
313 * use '\0' suffix in case of empty string
315 for (suffix = kbd_magic_keys; *suffix ||
316 suffix == kbd_magic_keys; ++suffix) {
317 sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
318 if (compare_magic (kbd_data, getenv (magic)) == 0) {
319 char cmd_name[sizeof (kbd_command_prefix) + 1];
322 sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
323 cmd = getenv (cmd_name);
331 #endif /* CONFIG_PREBOOT */
333 static int pcs440ep_readinputs (void)
338 /* read the inputs and set the Envvars */
339 /* Revision Level Bit 26 - 29 */
340 i = ((in32 (GPIO0_IR) & 0x0000003c) >> 2);
342 sprintf (value, "%02x", i);
343 setenv (ENV_NAME_REVLEV, value);
344 /* Solder Switch Bit 30 - 33 */
345 i = (in32 (GPIO0_IR) & 0x00000003) << 2;
346 i += (in32 (GPIO1_IR) & 0xc0000000) >> 30;
348 sprintf (value, "%02x", i);
349 setenv (ENV_NAME_SOLDER, value);
350 /* DIP Switch Bit 49 - 56 */
351 i = ((in32 (GPIO1_IR) & 0x00007f80) >> 7);
352 i = (swapbits[i & 0x0f] << 4) + swapbits[(i & 0xf0) >> 4];
353 sprintf (value, "%02x", i);
354 setenv (ENV_NAME_DIP, value);
359 #if defined(CONFIG_SHA1_CHECK_UB_IMG)
360 /*************************************************************************
361 * calculate a SHA1 sum for the U-Boot image in Flash.
363 ************************************************************************/
364 static int pcs440ep_sha1 (int docheck)
367 unsigned char *ptroff;
368 unsigned char output[20];
369 unsigned char org[20];
370 int i, len = CONFIG_SHA1_LEN;
372 memcpy ((char *)CFG_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
373 data = (unsigned char *)CFG_LOAD_ADDR;
374 ptroff = &data[len + SHA1_SUM_POS];
376 for (i = 0; i < SHA1_SUM_LEN; i++) {
381 sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
384 for (i = 0; i < 20 ; i++) {
385 printf("%02X ", output[i]);
390 for (i = 0; i < 20 ; i++) {
391 if (org[i] != output[i]) return 1;
397 /*************************************************************************
398 * do some checks after the SHA1 checksum from the U-Boot Image was
401 ************************************************************************/
402 static void pcs440ep_checksha1 (void)
407 ret = pcs440ep_sha1 (1);
408 if (ret == 0) return;
410 if ((cs_test = getenv ("cs_test")) == NULL) {
411 /* Env doesnt exist -> hang */
416 if (strncmp (cs_test, "off", 3) == 0) {
417 printf ("SHA1 U-Boot sum NOT ok!\n");
418 setenv ("bootdelay", "-1");
422 static __inline__ void pcs440ep_checksha1 (void) { do {} while (0);}
425 int misc_init_r (void)
430 /* Re-do sizing to get full correct info */
431 mtdcr(ebccfga, pb0cr);
432 pbcr = mfdcr(ebccfgd);
433 switch (gd->bd->bi_flashsize) {
459 pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
460 mtdcr(ebccfga, pb0cr);
461 mtdcr(ebccfgd, pbcr);
463 /* adjust flash start and offset */
464 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
465 gd->bd->bi_flashoffset = 0;
467 /* Monitor protection ON by default */
468 (void)flash_protect(FLAG_PROTECT_SET,
473 /* Env protection ON by default */
474 (void)flash_protect(FLAG_PROTECT_SET,
476 CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
479 pcs440ep_readinputs ();
480 pcs440ep_checksha1 ();
481 #ifdef CONFIG_PREBOOT
483 struct kbd_data_t kbd_data;
485 char *str = strdup (key_match (get_keys (&kbd_data)));
486 /* Set or delete definition */
487 setenv ("preboot", str);
490 #endif /* CONFIG_PREBOOT */
496 char *s = getenv("serial#");
498 printf("Board: PCS440EP");
508 void spd_ddr_init_hang (void)
510 status_led_set (0, STATUS_LED_OFF);
511 status_led_set (1, STATUS_LED_ON);
512 /* we cannot use hang() because we are still running from
513 Flash, and so the status_led driver is not initialized */
514 puts ("### ERROR ### Please RESET the board ###\n");
521 long int initdram (int board_type)
525 status_led_set (0, STATUS_LED_ON);
526 status_led_set (1, STATUS_LED_OFF);
527 dram_size = spd_sdram();
528 status_led_set (0, STATUS_LED_OFF);
529 status_led_set (1, STATUS_LED_ON);
530 if (dram_size == 0) {
537 #if defined(CFG_DRAM_TEST)
540 unsigned long *mem = (unsigned long *)0;
541 const unsigned long kend = (1024 / sizeof(unsigned long));
546 for (k = 0; k < CFG_KBYTES_SDRAM;
547 ++k, mem += (1024 / sizeof(unsigned long))) {
548 if ((k & 1023) == 0) {
549 printf("%3d MB\r", k / 1024);
552 memset(mem, 0xaaaaaaaa, 1024);
553 for (n = 0; n < kend; ++n) {
554 if (mem[n] != 0xaaaaaaaa) {
555 printf("SDRAM test fails at: %08x\n",
561 memset(mem, 0x55555555, 1024);
562 for (n = 0; n < kend; ++n) {
563 if (mem[n] != 0x55555555) {
564 printf("SDRAM test fails at: %08x\n",
570 printf("SDRAM test passes\n");
575 /*************************************************************************
578 * This routine is called just prior to registering the hose and gives
579 * the board the opportunity to check things. Returning a value of zero
580 * indicates that things are bad & PCI initialization should be aborted.
582 * Different boards may wish to customize the pci controller structure
583 * (add regions, override default access routines, etc) or perform
584 * certain pre-initialization actions.
586 ************************************************************************/
587 #if defined(CONFIG_PCI)
588 int pci_pre_init(struct pci_controller *hose)
592 /*-------------------------------------------------------------------------+
593 | Set priority for all PLB3 devices to 0.
594 | Set PLB3 arbiter to fair mode.
595 +-------------------------------------------------------------------------*/
596 mfsdr(sdr_amp1, addr);
597 mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
598 addr = mfdcr(plb3_acr);
599 mtdcr(plb3_acr, addr | 0x80000000);
601 /*-------------------------------------------------------------------------+
602 | Set priority for all PLB4 devices to 0.
603 +-------------------------------------------------------------------------*/
604 mfsdr(sdr_amp0, addr);
605 mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
606 addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
607 mtdcr(plb4_acr, addr);
609 /*-------------------------------------------------------------------------+
610 | Set Nebula PLB4 arbiter to fair mode.
611 +-------------------------------------------------------------------------*/
613 addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
614 addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
615 addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
616 addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
617 mtdcr(plb0_acr, addr);
620 addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
621 addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
622 addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
623 addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
624 mtdcr(plb1_acr, addr);
628 #endif /* defined(CONFIG_PCI) */
630 /*************************************************************************
633 * The bootstrap configuration provides default settings for the pci
634 * inbound map (PIM). But the bootstrap config choices are limited and
635 * may not be sufficient for a given board.
637 ************************************************************************/
638 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
639 void pci_target_init(struct pci_controller *hose)
641 /*--------------------------------------------------------------------------+
642 * Set up Direct MMIO registers
643 *--------------------------------------------------------------------------*/
644 /*--------------------------------------------------------------------------+
645 | PowerPC440 EP PCI Master configuration.
646 | Map one 1Gig range of PLB/processor addresses to PCI memory space.
647 | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
648 | Use byte reversed out routines to handle endianess.
649 | Make this region non-prefetchable.
650 +--------------------------------------------------------------------------*/
651 out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
652 out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
653 out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */
654 out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
655 out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
657 out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
658 out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
659 out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */
660 out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
661 out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
663 out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
664 out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
665 out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
666 out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
668 /*--------------------------------------------------------------------------+
669 * Set up Configuration registers
670 *--------------------------------------------------------------------------*/
672 /* Program the board's subsystem id/vendor id */
673 pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
674 CFG_PCI_SUBSYS_VENDORID);
675 pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
677 /* Configure command register as bus master */
678 pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
680 /* 240nS PCI clock */
681 pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
683 /* No error reporting */
684 pci_write_config_word(0, PCI_ERREN, 0);
686 pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
689 #endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
691 /*************************************************************************
694 ************************************************************************/
695 #if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
696 void pci_master_init(struct pci_controller *hose)
698 unsigned short temp_short;
700 /*--------------------------------------------------------------------------+
701 | Write the PowerPC440 EP PCI Configuration regs.
702 | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
703 | Enable PowerPC440 EP to act as a PCI memory target (PTM).
704 +--------------------------------------------------------------------------*/
705 pci_read_config_word(0, PCI_COMMAND, &temp_short);
706 pci_write_config_word(0, PCI_COMMAND,
707 temp_short | PCI_COMMAND_MASTER |
710 #endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
712 /*************************************************************************
715 * This routine is called to determine if a pci scan should be
716 * performed. With various hardware environments (especially cPCI and
717 * PPMC) it's insufficient to depend on the state of the arbiter enable
718 * bit in the strap register, or generic host/adapter assumptions.
720 * Rather than hard-code a bad assumption in the general 440 code, the
721 * 440 pci code requires the board to decide at runtime.
723 * Return 0 for adapter mode, non-zero for host (monarch) mode.
726 ************************************************************************/
727 #if defined(CONFIG_PCI)
728 int is_pci_host(struct pci_controller *hose)
730 /* PCS440EP is always configured as host. */
733 #endif /* defined(CONFIG_PCI) */
735 /*************************************************************************
738 * This routine is called to reset (keep alive) the watchdog timer
740 ************************************************************************/
741 #if defined(CONFIG_HW_WATCHDOG)
742 void hw_watchdog_reset(void)
748 /*************************************************************************
749 * "led" Commando for the U-Boot shell
751 ************************************************************************/
752 int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
757 pattern = simple_strtoul (argv[1], NULL, 10);
774 "led - set the led\n",
778 #if defined(CONFIG_SHA1_CHECK_UB_IMG)
779 /*************************************************************************
780 * "sha1" Commando for the U-Boot shell
782 ************************************************************************/
783 int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
789 printf ("Usage:\n%s\n", cmdtp->usage);
795 unsigned char output[20];
799 data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
800 len = simple_strtoul (argv[2], NULL, 16);
801 sha1_csum (data, len, (unsigned char *)output);
802 printf ("U-Boot sum:\n");
803 for (i = 0; i < 20 ; i++) {
804 printf ("%02X ", output[i]);
808 data = (unsigned char *)simple_strtoul (argv[3], NULL, 16);
809 memcpy (data, output, 20);
815 if (*ptr != '-') goto usage;
817 if ((*ptr == 'c') || (*ptr == 'C')) {
818 rcode = pcs440ep_sha1 (1);
819 printf ("SHA1 U-Boot sum %sok!\n", (rcode != 0) ? "not " : "");
820 } else if ((*ptr == 'p') || (*ptr == 'P')) {
821 rcode = pcs440ep_sha1 (2);
823 rcode = pcs440ep_sha1 (0);
832 "sha1 - calculate the SHA1 Sum\n",
833 "address len [addr] calculate the SHA1 sum [save at addr]\n"
834 " -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
835 " -c check the U-Boot image in flash\n"
839 #ifdef CONFIG_IDE_PREINIT
840 int ide_preinit (void)
842 /* Set True IDE Mode */
843 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00100000));
844 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
845 out32 (GPIO1_OR, (in32 (GPIO1_OR) & ~0x00008040));
851 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
852 void ide_set_reset (int idereset)
854 debug ("ide_reset(%d)\n", idereset);
856 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
858 out32 (GPIO0_OR, (in32 (GPIO0_OR) & ~0x00200000));
862 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */