3 * Heiko Schocher, DENX Software Engineering, hs@denx.de
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 * SPDX-License-Identifier: GPL-2.0+
13 #if defined(CONFIG_CMD_NAND)
15 #include <asm/processor.h>
18 struct alpr_ndfc_regs {
28 static struct alpr_ndfc_regs *alpr_ndfc = NULL;
30 #define readb(addr) (u8)(*(volatile u8 *)(addr))
31 #define writeb(d,addr) *(volatile u8 *)(addr) = ((u8)(d))
34 * The ALPR has a NAND Flash Controller (NDFC) that handles all accesses to
35 * the NAND devices. The NDFC has command, address and data registers that
36 * when accessed will set up the NAND flash pins appropriately. We'll use the
37 * hwcontrol function to save the configuration in a global variable.
38 * We can then use this information in the read and write functions to
39 * determine which NDFC register to access.
41 * There are 2 NAND devices on the board, a Hynix HY27US08561A (1 GByte).
43 static void alpr_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
45 struct nand_chip *this = mtd->priv;
47 if (ctrl & NAND_CTRL_CHANGE) {
48 if ( ctrl & NAND_CLE )
52 if ( ctrl & NAND_ALE )
56 if ( (ctrl & NAND_NCE) != NAND_NCE)
57 writeb(0x00, &(alpr_ndfc->term));
59 if (cmd != NAND_CMD_NONE)
60 writeb(cmd, this->IO_ADDR_W);
63 static u_char alpr_nand_read_byte(struct mtd_info *mtd)
65 return readb(&(alpr_ndfc->data));
68 static void alpr_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
70 struct nand_chip *nand = mtd->priv;
73 for (i = 0; i < len; i++) {
76 * IO_ADDR_W used as CMD[i] reg to support multiple NAND
79 writeb(buf[i], nand->IO_ADDR_W);
81 writeb(buf[i], &(alpr_ndfc->addr_wait));
83 writeb(buf[i], &(alpr_ndfc->data));
87 static void alpr_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
91 for (i = 0; i < len; i++) {
92 buf[i] = readb(&(alpr_ndfc->data));
96 static int alpr_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
100 for (i = 0; i < len; i++)
101 if (buf[i] != readb(&(alpr_ndfc->data)))
107 static int alpr_nand_dev_ready(struct mtd_info *mtd)
110 * Blocking read to wait for NAND to be ready
112 (void)readb(&(alpr_ndfc->addr_wait));
120 int board_nand_init(struct nand_chip *nand)
122 alpr_ndfc = (struct alpr_ndfc_regs *)CONFIG_SYS_NAND_BASE;
124 nand->ecc.mode = NAND_ECC_SOFT;
126 /* Reference hardware control function */
127 nand->cmd_ctrl = alpr_nand_hwcontrol;
128 nand->read_byte = alpr_nand_read_byte;
129 nand->write_buf = alpr_nand_write_buf;
130 nand->read_buf = alpr_nand_read_buf;
131 nand->verify_buf = alpr_nand_verify_buf;
132 nand->dev_ready = alpr_nand_dev_ready;