3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
10 * BEC Systems <http://bec-systems.com>
11 * Cliff Brake <cliff.brake@gmail.com>
12 * Support for Accelent/Vibren PXA255 IDP
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #include <asm/arch/pxa.h>
38 #include <asm/arch/regs-mmc.h>
40 DECLARE_GLOBAL_DATA_PTR;
43 * Miscelaneous platform dependent initialisations
48 /* We have RAM, disable cache */
52 /* arch number of Lubbock-Board */
53 gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
55 /* adress of boot parameters */
56 gd->bd->bi_boot_params = 0xa0000100;
58 /* turn on serial ports */
59 *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
62 /* a value that works is 60Hz, 77% duty cycle */
63 writel(readl(CKEN) | CKEN0_PWM0, CKEN);
64 writel(0x3f, PWM_CTRL0);
65 writel(0x3ff, PWM_PERVAL0);
66 writel(792, PWM_PWDUTY0);
68 /* clear reset to AC97 codec */
69 writel(readl(CKEN) | CKEN2_AC97, CKEN);
70 writel(GCR_COLD_RST, GCR);
72 /* enable LCD backlight */
73 /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
76 /* lcd_puts("This is a test\nTest #2\n"); */
82 int board_mmc_init(bd_t *bis)
89 int board_late_init(void)
91 setenv("stdout", "serial");
92 setenv("stderr", "serial");
99 gd->ram_size = PHYS_SDRAM_1_SIZE;
103 void dram_init_banksize(void)
105 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
106 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
109 #ifdef DEBUG_BLINKC_ENABLE
113 /* reset OSCR to 0 */
115 while (readl(OSCR) > 0x10000)
118 while (readl(OSCR) < 0xd4000)
124 int led_bit = (1<<10);
126 writel(led_bit, GPDR0);
127 writel(led_bit, GPCR0);
129 writel(led_bit, GPSR0);
131 writel(led_bit, GPCR0);
134 int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
136 printf("IDPCMD started\n");
140 U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
141 "custom IDP command",
142 "no args at this time"
147 #ifdef CONFIG_CMD_NET
148 int board_eth_init(bd_t *bis)
151 #ifdef CONFIG_SMC91111
152 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);