1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
8 #include <asm/addrspace.h>
10 #include <mach/ar71xx_regs.h>
12 #include <mach/ath79.h>
13 #include <debug_uart.h>
15 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
16 void board_debug_uart_init(void)
21 regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
25 * GPIO9 as input, GPIO10 as output
27 val = readl(regs + AR71XX_GPIO_REG_OE);
28 val |= QCA953X_GPIO(9);
29 val &= ~QCA953X_GPIO(10);
30 writel(val, regs + AR71XX_GPIO_REG_OE);
33 * Enable GPIO10 as UART0_SOUT
35 val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2);
36 val &= ~QCA953X_GPIO_MUX_MASK(16);
37 val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16;
38 writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2);
41 * Enable GPIO9 as UART0_SIN
43 val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0);
44 val &= ~QCA953X_GPIO_MUX_MASK(8);
45 val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8;
46 writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0);
49 * Enable GPIO10 output
51 val = readl(regs + AR71XX_GPIO_REG_OUT);
52 val |= QCA953X_GPIO(10);
53 writel(val, regs + AR71XX_GPIO_REG_OUT);
57 int board_early_init_f(void)