2 * Copyright (C) 2008 Renesas Solutions Corp.
3 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
5 * board/ap325rxa/lowlevel_init.S
7 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/processor.h>
13 #include <asm/macro.h>
16 * Board specific low level init code, called _very_ early in the
17 * startup sequence. Relocation to SDRAM has not happened yet, no
18 * stack is available, bss section has not been initialised, etc.
20 * (Note: As no stack is available, no subroutines can be called...).
29 write16 DRVCRA_A, DRVCRA_D
31 write16 DRVCRB_A, DRVCRB_D
33 write16 RWTCSR_A, RWTCSR_D1
35 write16 RWTCNT_A, RWTCNT_D
37 write16 RWTCSR_A, RWTCSR_D2
39 write32 FRQCR_A, FRQCR_D
41 write32 CMNCR_A, CMNCR_D
43 write32 CS0BCR_A, CS0BCR_D
45 write32 CS4BCR_A, CS4BCR_D
47 write32 CS5ABCR_A, CS5ABCR_D
49 write32 CS5BBCR_A, CS5BBCR_D
51 write32 CS6ABCR_A, CS6ABCR_D
53 write32 CS6BBCR_A, CS6BBCR_D
55 write32 CS0WCR_A, CS0WCR_D
57 write32 CS4WCR_A, CS4WCR_D
59 write32 CS5AWCR_A, CS5AWCR_D
61 write32 CS5BWCR_A, CS5BWCR_D
63 write32 CS6AWCR_A, CS6AWCR_D
65 write32 CS6BWCR_A, CS6BWCR_D
67 write32 SBSC_SDCR_A, SBSC_SDCR_D1
69 write32 SBSC_SDWCR_A, SBSC_SDWCR_D
71 write32 SBSC_SDPCR_A, SBSC_SDPCR_D
73 write32 SBSC_RTCSR_A, SBSC_RTCSR_D
75 write32 SBSC_RTCNT_A, SBSC_RTCNT_D
77 write32 SBSC_RTCOR_A, SBSC_RTCOR_D
79 write8 SBSC_SDMR3_A1, SBSC_SDMR3_D
81 write8 SBSC_SDMR3_A2, SBSC_SDMR3_D
89 write8 SBSC_SDMR3_A3, SBSC_SDMR3_D
91 write32 SBSC_SDCR_A, SBSC_SDCR_D2
95 ! BL bit off (init = ON) (?!?)
97 stc sr, r0 ! BL bit off(init=ON)
107 DRVCRA_A: .long DRVCRA
108 DRVCRB_A: .long DRVCRB
109 DRVCRA_D: .word 0x4555
110 DRVCRB_D: .word 0x0005
112 RWTCSR_A: .long RWTCSR
113 RWTCNT_A: .long RWTCNT
115 RWTCSR_D1: .word 0xa507
116 RWTCSR_D2: .word 0xa504
117 RWTCNT_D: .word 0x5a00
119 FRQCR_D: .long 0x0b04474a
121 SBSC_SDCR_A: .long SBSC_SDCR
122 SBSC_SDWCR_A: .long SBSC_SDWCR
123 SBSC_SDPCR_A: .long SBSC_SDPCR
124 SBSC_RTCSR_A: .long SBSC_RTCSR
125 SBSC_RTCNT_A: .long SBSC_RTCNT
126 SBSC_RTCOR_A: .long SBSC_RTCOR
127 SBSC_SDMR3_A1: .long 0xfe510000
128 SBSC_SDMR3_A2: .long 0xfe500242
129 SBSC_SDMR3_A3: .long 0xfe5c0042
131 SBSC_SDCR_D1: .long 0x92810112
132 SBSC_SDCR_D2: .long 0x92810912
133 SBSC_SDWCR_D: .long 0x05162482
134 SBSC_SDPCR_D: .long 0x00300087
135 SBSC_RTCSR_D: .long 0xa55a0212
136 SBSC_RTCNT_D: .long 0xa55a0000
137 SBSC_RTCOR_D: .long 0xa55a0040
138 SBSC_SDMR3_D: .long 0x00
141 CS0BCR_A: .long CS0BCR
142 CS4BCR_A: .long CS4BCR
143 CS5ABCR_A: .long CS5ABCR
144 CS5BBCR_A: .long CS5BBCR
145 CS6ABCR_A: .long CS6ABCR
146 CS6BBCR_A: .long CS6BBCR
147 CS0WCR_A: .long CS0WCR
148 CS4WCR_A: .long CS4WCR
149 CS5AWCR_A: .long CS5AWCR
150 CS5BWCR_A: .long CS5BWCR
151 CS6AWCR_A: .long CS6AWCR
152 CS6BWCR_A: .long CS6BWCR
154 CMNCR_D: .long 0x00000013
155 CS0BCR_D: .long 0x24920400
156 CS4BCR_D: .long 0x24920400
157 CS5ABCR_D: .long 0x24920400
158 CS5BBCR_D: .long 0x7fff0600
159 CS6ABCR_D: .long 0x24920400
160 CS6BBCR_D: .long 0x24920600
161 CS0WCR_D: .long 0x00000480
162 CS4WCR_D: .long 0x00000480
163 CS5AWCR_D: .long 0x00000380
164 CS5BWCR_D: .long 0x00000080
165 CS6AWCR_D: .long 0x00000300
166 CS6BWCR_D: .long 0x00000540
168 CCR_A: .long 0xff00001c
169 CCR_D: .long 0x0000090d
171 SLEEP_CNT: .long 0x00000800
172 SR_MASK_D: .long 0xEFFFFF0F