2 * Copyright (C) 2007,2008
3 * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/processor.h>
15 DECLARE_GLOBAL_DATA_PTR;
19 puts("BOARD: Renesas Solutions R2D Plus\n");
30 gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
31 gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
32 printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
36 int board_late_init(void)
41 #define FPGA_BASE 0xA4000000
42 #define FPGA_CFCTL (FPGA_BASE + 0x04)
43 #define CFCTL_EN (0x432)
44 #define FPGA_CFPOW (FPGA_BASE + 0x06)
45 #define CFPOW_ON (0x02)
46 #define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
47 #define CFCDINTCLR_EN (0x01)
49 void ide_set_reset(int idereset)
51 /* if reset = 1 IDE reset will be asserted */
53 outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
54 outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
55 outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
59 static struct pci_controller hose;
60 void pci_init_board(void)
62 pci_sh7751_init(&hose);
65 int board_eth_init(bd_t *bis)
67 return pci_eth_init(bis);