1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
6 #define PCIREG_8(_adr) (*(volatile unsigned char *)(_adr))
7 #define PCIREG_32(_adr) (*(volatile unsigned long *)(_adr))
8 #define PCI_PAR PCIREG_32(0xfe0401c0)
9 #define PCI_PDR PCIREG_32(0xfe040220)
10 #define PCI_CR PCIREG_32(0xfe040100)
11 #define PCI_CONF1 PCIREG_32(0xfe040004)
17 #define PCI_EEP_ADDRESS (unsigned short)0x0007
18 #define PCI_MAC_ADDRESS_SIZE 3
24 #define MAC_EEP_READ 1
25 #define MAC_EEP_WRITE 2
26 #define MAC_EEP_ERACE 3
27 #define MAC_EEP_EWEN 4
28 #define MAC_EEP_EWDS 5
31 const unsigned short EEPROM_W_Data_8169_A[] = {
32 0x8129, 0x10ec, 0x8169, 0x1154, 0x032b,
35 const unsigned short EEPROM_W_Data_8169_B[] = {
36 0x4d15, 0xf7c2, 0x8000, 0x0000, 0x0000, 0x1300,
37 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
38 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x2000,
39 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
40 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
41 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
42 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000