2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/adc.h>
31 #include <asm/arch/gpio.h>
32 #include <asm/arch/mmc.h>
33 #include <asm/arch/pinmux.h>
34 #include <asm/arch/watchdog.h>
37 #include <power/pmic.h>
38 #include <usb/s3c_udc.h>
39 #include <asm/arch/cpu.h>
40 #include <power/max8998_pmic.h>
42 DECLARE_GLOBAL_DATA_PTR;
44 struct exynos4_gpio_part1 *gpio1;
45 struct exynos4_gpio_part2 *gpio2;
46 unsigned int board_rev;
48 u32 get_board_rev(void)
53 static int get_hwrev(void)
55 return board_rev & 0xFF;
58 static void init_pmic_lcd(void);
60 int power_init_board(void)
64 ret = pmic_init(I2C_5);
75 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
76 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
81 void dram_init_banksize(void)
83 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
84 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
85 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
86 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
89 static unsigned short get_adc_value(int channel)
91 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
92 unsigned short ret = 0;
94 unsigned int loop = 0;
96 writel(channel & 0xF, &adc->adcmux);
97 writel((1 << 14) | (49 << 6), &adc->adccon);
98 writel(1000 & 0xffff, &adc->adcdly);
99 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
101 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
106 reg = readl(&adc->adccon);
107 } while (!(reg & (1 << 15)) && (loop++ < 1000));
109 ret = readl(&adc->adcdat0) & 0xFFF;
114 static int adc_power_control(int on)
117 struct pmic *p = pmic_get("MAX8998_PMIC");
124 ret = pmic_set_output(p,
131 static unsigned int get_hw_revision(void)
133 int hwrev, mode0, mode1;
135 adc_power_control(1);
137 mode0 = get_adc_value(1); /* HWREV_MODE0 */
138 mode1 = get_adc_value(2); /* HWREV_MODE1 */
141 * XXX Always set the default hwrev as the latest board
142 * ADC = (voltage) / 3.3 * 4096
146 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
147 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
148 hwrev = 0x0; /* 0.01V 0.01V */
149 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
150 hwrev = 0x1; /* 610mV 0.01V */
151 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
152 hwrev = 0x2; /* 1.16V 0.01V */
153 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
154 hwrev = 0x3; /* 1.79V 0.01V */
157 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
159 adc_power_control(0);
164 static void check_hw_revision(void)
168 hwrev = get_hw_revision();
173 #ifdef CONFIG_DISPLAY_BOARDINFO
176 puts("Board:\tUniversal C210\n");
181 #ifdef CONFIG_GENERIC_MMC
182 int board_mmc_init(bd_t *bis)
186 switch (get_hwrev()) {
189 * Set the low to enable LDO_EN
190 * But when you use the test board for eMMC booting
191 * you should set it HIGH since it removes the inverter
193 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
194 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
198 * Default reset state is High and there's no inverter
199 * But set it as HIGH to ensure
201 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
202 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
208 * mmc0 : eMMC (8-bit buswidth)
209 * mmc2 : SD card (4-bit buswidth)
211 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
213 debug("SDMMC0 not configured\n");
215 err = s5p_mmc_init(0, 8);
218 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
219 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
222 * Check the T-flash detect pin
223 * GPX3[4] T-flash detect pin
225 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
226 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
228 debug("SDMMC2 not configured\n");
230 err = s5p_mmc_init(2, 4);
238 #ifdef CONFIG_USB_GADGET
239 static int s5pc210_phy_control(int on)
242 struct pmic *p = pmic_get("MAX8998_PMIC");
250 ret |= pmic_set_output(p,
251 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
252 MAX8998_SAFEOUT1, LDO_ON);
253 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
254 MAX8998_LDO3, LDO_ON);
255 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
256 MAX8998_LDO8, LDO_ON);
259 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
260 MAX8998_LDO8, LDO_OFF);
261 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
262 MAX8998_LDO3, LDO_OFF);
263 ret |= pmic_set_output(p,
264 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
265 MAX8998_SAFEOUT1, LDO_OFF);
269 puts("MAX8998 LDO setting error!\n");
276 struct s3c_plat_otg_data s5pc210_otg_data = {
277 .phy_control = s5pc210_phy_control,
278 .regs_phy = EXYNOS4_USBPHY_BASE,
279 .regs_otg = EXYNOS4_USBOTG_BASE,
280 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
281 .usb_flags = PHY0_SLEEP,
285 int board_early_init_f(void)
292 #ifdef CONFIG_SOFT_SPI
293 static void soft_spi_init(void)
295 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
296 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
297 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
298 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
299 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
300 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
303 void spi_cs_activate(struct spi_slave *slave)
305 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
306 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
308 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
309 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
312 void spi_cs_deactivate(struct spi_slave *slave)
314 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
315 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
318 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
320 return bus == 0 && cs == 0;
323 void universal_spi_scl(int bit)
325 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
328 void universal_spi_sda(int bit)
330 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
333 int universal_spi_read(void)
335 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
339 static void init_pmic_lcd(void)
344 struct pmic *p = pmic_get("MAX8998_PMIC");
353 val = 0x02; /* (1800 - 1600) / 100; */
354 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
357 val = 0xe; /* (3000 - 1600) / 100; */
358 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
360 /* Disable unneeded regulators */
363 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
364 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
367 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
370 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
371 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
374 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
377 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
378 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
381 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
384 puts("LCD pmic initialisation error!\n");
387 static void lcd_cfg_gpio(void)
389 unsigned int i, f3_end = 4;
391 for (i = 0; i < 8; i++) {
392 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
393 s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
394 s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
395 s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
396 /* pull-up/down disable */
397 s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
398 s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
399 s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
401 /* drive strength to max (24bit) */
402 s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
403 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
404 s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
405 s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
406 s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
407 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
410 for (i = 0; i < f3_end; i++) {
411 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
412 s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
413 /* pull-up/down disable */
414 s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
415 /* drive strength to max (24bit) */
416 s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
417 s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
420 /* gpio pad configuration for LCD reset. */
421 s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
426 static void reset_lcd(void)
428 s5p_gpio_set_value(&gpio2->y4, 5, 1);
430 s5p_gpio_set_value(&gpio2->y4, 5, 0);
432 s5p_gpio_set_value(&gpio2->y4, 5, 1);
436 static void lcd_power_on(void)
438 struct pmic *p = pmic_get("MAX8998_PMIC");
446 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
447 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
450 vidinfo_t panel_info = {
456 .vl_clkp = CONFIG_SYS_HIGH,
457 .vl_hsp = CONFIG_SYS_HIGH,
458 .vl_vsp = CONFIG_SYS_HIGH,
459 .vl_dp = CONFIG_SYS_HIGH,
461 .vl_bpix = 5, /* Bits per pixel */
463 /* LD9040 LCD Panel */
471 .vl_cmd_allow_len = 0xf,
474 .cfg_gpio = lcd_cfg_gpio,
475 .backlight_on = NULL,
476 .lcd_power_on = lcd_power_on,
477 .reset_lcd = reset_lcd,
478 .dual_lcd_enabled = 0,
481 .power_on_delay = 10000,
482 .reset_delay = 10000,
483 .interface_mode = FIMD_RGB_INTERFACE,
487 void init_panel_info(vidinfo_t *vid)
490 vid->resolution = HD_RESOLUTION;
491 vid->rgb_mode = MODE_RGB_P;
494 get_tizen_logo_info(vid);
498 vid->pclk_name = 1; /* MPLL */
501 vid->cfg_ldo = ld9040_cfg_ldo;
502 vid->enable_ldo = ld9040_enable_ldo;
504 setenv("lcdinfo", "lcd=ld9040");
509 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
510 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
512 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
513 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
515 #ifdef CONFIG_SOFT_SPI
519 printf("HW Revision:\t0x%x\n", board_rev);