2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/adc.h>
15 #include <asm/arch/pinmux.h>
16 #include <asm/arch/watchdog.h>
18 #include <power/pmic.h>
20 #include <usb/dwc2_udc.h>
21 #include <asm/arch/cpu.h>
22 #include <power/max8998_pmic.h>
24 #include <samsung/misc.h>
25 #include <usb_mass_storage.h>
27 DECLARE_GLOBAL_DATA_PTR;
29 unsigned int board_rev;
31 u32 get_board_rev(void)
36 static int get_hwrev(void)
38 return board_rev & 0xFF;
41 int exynos_power_init(void)
43 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
47 * For PMIC the I2C bus is named as I2C5, but it is connected
48 * to logical I2C adapter 0
50 ret = pmic_init(I2C_0);
59 static unsigned short get_adc_value(int channel)
61 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
62 unsigned short ret = 0;
64 unsigned int loop = 0;
66 writel(channel & 0xF, &adc->adcmux);
67 writel((1 << 14) | (49 << 6), &adc->adccon);
68 writel(1000 & 0xffff, &adc->adcdly);
69 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
71 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
76 reg = readl(&adc->adccon);
77 } while (!(reg & (1 << 15)) && (loop++ < 1000));
79 ret = readl(&adc->adcdat0) & 0xFFF;
84 static int adc_power_control(int on)
86 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
88 struct pmic *p = pmic_get("MAX8998_PMIC");
95 ret = pmic_set_output(p,
105 static unsigned int get_hw_revision(void)
107 int hwrev, mode0, mode1;
109 adc_power_control(1);
111 mode0 = get_adc_value(1); /* HWREV_MODE0 */
112 mode1 = get_adc_value(2); /* HWREV_MODE1 */
115 * XXX Always set the default hwrev as the latest board
116 * ADC = (voltage) / 3.3 * 4096
120 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
121 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
122 hwrev = 0x0; /* 0.01V 0.01V */
123 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
124 hwrev = 0x1; /* 610mV 0.01V */
125 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
126 hwrev = 0x2; /* 1.16V 0.01V */
127 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
128 hwrev = 0x3; /* 1.79V 0.01V */
131 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
133 adc_power_control(0);
138 static void check_hw_revision(void)
142 hwrev = get_hw_revision();
147 #ifdef CONFIG_USB_GADGET
148 static int s5pc210_phy_control(int on)
150 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
152 struct pmic *p = pmic_get("MAX8998_PMIC");
160 ret |= pmic_set_output(p,
161 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
162 MAX8998_SAFEOUT1, LDO_ON);
163 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
164 MAX8998_LDO3, LDO_ON);
165 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
166 MAX8998_LDO8, LDO_ON);
169 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
170 MAX8998_LDO8, LDO_OFF);
171 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
172 MAX8998_LDO3, LDO_OFF);
173 ret |= pmic_set_output(p,
174 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
175 MAX8998_SAFEOUT1, LDO_OFF);
179 puts("MAX8998 LDO setting error!\n");
186 struct dwc2_plat_otg_data s5pc210_otg_data = {
187 .phy_control = s5pc210_phy_control,
188 .regs_phy = EXYNOS4_USBPHY_BASE,
189 .regs_otg = EXYNOS4_USBOTG_BASE,
190 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
191 .usb_flags = PHY0_SLEEP,
195 int board_usb_init(int index, enum usb_init_type init)
197 debug("USB_udc_probe\n");
198 return dwc2_udc_probe(&s5pc210_otg_data);
201 int exynos_early_init_f(void)
208 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
209 static void init_pmic_lcd(void)
214 struct pmic *p = pmic_get("MAX8998_PMIC");
223 val = 0x02; /* (1800 - 1600) / 100; */
224 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
227 val = 0xe; /* (3000 - 1600) / 100; */
228 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
230 /* Disable unneeded regulators */
233 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
234 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
237 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
240 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
241 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
244 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
247 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
248 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
251 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
254 puts("LCD pmic initialisation error!\n");
258 void exynos_cfg_lcd_gpio(void)
260 unsigned int i, f3_end = 4;
262 for (i = 0; i < 8; i++) {
263 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
264 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
265 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
266 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
267 /* pull-up/down disable */
268 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
269 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
270 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
272 /* drive strength to max (24bit) */
273 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
274 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
275 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
276 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
277 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
278 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
281 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
282 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
283 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
284 /* pull-up/down disable */
285 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
286 /* drive strength to max (24bit) */
287 gpio_set_drv(i, S5P_GPIO_DRV_4X);
288 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
291 /* gpio pad configuration for LCD reset. */
292 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
293 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
301 void exynos_reset_lcd(void)
303 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
305 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
307 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
311 void exynos_lcd_power_on(void)
313 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
314 struct pmic *p = pmic_get("MAX8998_PMIC");
322 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
323 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
327 void exynos_cfg_ldo(void)
332 void exynos_enable_ldo(unsigned int onoff)
334 ld9040_enable_ldo(onoff);
337 int exynos_init(void)
339 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
342 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
344 switch (get_hwrev()) {
347 * Set the low to enable LDO_EN
348 * But when you use the test board for eMMC booting
349 * you should set it HIGH since it removes the inverter
351 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
352 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
353 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
357 * Default reset state is High and there's no inverter
358 * But set it as HIGH to ensure
360 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
361 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
362 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
366 #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
367 /* Request soft I2C gpios */
368 strcpy(buf, "soft_i2c_scl");
369 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, buf);
371 strcpy(buf, "soft_i2c_sda");
372 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, buf);
375 printf("HW Revision:\t0x%x\n", board_rev);
381 void exynos_lcd_misc_init(vidinfo_t *vid)
384 get_tizen_logo_info(vid);
388 vid->pclk_name = 1; /* MPLL */
391 setenv("lcdinfo", "lcd=ld9040");