2 * Board functions for Siemens CORVUS (AT91SAM9G45) based board
3 * (C) Copyright 2013 Siemens AG
6 * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
7 * (C) Copyright 2007-2008
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
11 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/at91sam9g45_matrix.h>
18 #include <asm/arch/at91sam9_smc.h>
19 #include <asm/arch/at91_common.h>
20 #include <asm/arch/at91_rstc.h>
21 #include <asm/arch/atmel_serial.h>
22 #include <asm/arch/gpio.h>
24 #include <asm/arch/clk.h>
25 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
33 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
34 #include <asm/arch/atmel_usba_udc.h>
37 DECLARE_GLOBAL_DATA_PTR;
39 static void corvus_request_gpio(void)
41 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
42 gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
43 gpio_request(AT91_PIN_PD7, "d0");
44 gpio_request(AT91_PIN_PD8, "d1");
45 gpio_request(AT91_PIN_PA12, "d2");
46 gpio_request(AT91_PIN_PA13, "d3");
47 gpio_request(AT91_PIN_PA15, "d4");
48 gpio_request(AT91_PIN_PB7, "recovery button");
49 gpio_request(AT91_PIN_PD1, "USB0");
50 gpio_request(AT91_PIN_PD3, "USB1");
51 gpio_request(AT91_PIN_PB18, "SPICS1");
52 gpio_request(AT91_PIN_PB3, "SPICS0");
53 gpio_request(CONFIG_RED_LED, "red led");
54 gpio_request(CONFIG_GREEN_LED, "green led");
57 static void corvus_nand_hw_init(void)
59 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
60 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
64 csa = readl(&matrix->ebicsa);
65 csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
66 writel(csa, &matrix->ebicsa);
68 /* Configure SMC CS3 for NAND/SmartMedia */
69 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
70 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
72 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
73 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
75 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
77 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
78 AT91_SMC_MODE_EXNW_DISABLE |
79 #ifdef CONFIG_SYS_NAND_DBW_16
80 AT91_SMC_MODE_DBW_16 |
81 #else /* CONFIG_SYS_NAND_DBW_8 */
84 AT91_SMC_MODE_TDF_CYCLE(3),
87 at91_periph_clk_enable(ATMEL_ID_PIOC);
88 at91_periph_clk_enable(ATMEL_ID_PIOA);
90 /* Enable NandFlash */
91 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
92 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
95 #if defined(CONFIG_SPL_BUILD)
99 void spl_board_init(void)
101 corvus_request_gpio();
103 * For on the sam9m10g45ek board, the chip wm9711 stay in the test
104 * mode, so it need do some action to exit mode.
106 at91_set_gpio_output(AT91_PIN_PD7, 0);
107 at91_set_gpio_output(AT91_PIN_PD8, 0);
108 at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1);
109 at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1);
110 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
111 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
112 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
114 corvus_nand_hw_init();
116 /* Configure recovery button PINs */
117 at91_set_gpio_input(AT91_PIN_PB7, 1);
119 /* check if button is pressed */
120 if (at91_get_gpio_value(AT91_PIN_PB7) == 0) {
123 debug("Recovery button pressed\n");
124 boot_device = spl_boot_device();
125 switch (boot_device) {
126 #ifdef CONFIG_SPL_NAND_SUPPORT
127 case BOOT_DEVICE_NAND:
129 spl_nand_erase_one(0, 0);
136 #include <asm/arch/atmel_mpddrc.h>
137 static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
139 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
141 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
142 ATMEL_MPDDRC_CR_NR_ROW_14 |
143 ATMEL_MPDDRC_CR_DIC_DS |
144 ATMEL_MPDDRC_CR_DQMS_SHARED |
145 ATMEL_MPDDRC_CR_CAS_DDR_CAS3);
148 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */
149 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */
150 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */
151 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | /* 8*7.5 = 75 ns */
152 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | /* 2*7.5 = 15 ns */
153 1 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | /* 1*7.5= 7.5 ns*/
154 1 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | /* 1 clk cycle */
155 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); /* 2 clk cycles */
157 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */
158 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
159 16 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
160 14 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
162 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
163 0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
164 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
165 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
170 struct atmel_mpddrc_config ddr2;
174 at91_system_clk_enable(AT91_PMC_DDR);
176 /* DDRAM2 Controller initialize */
177 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
181 #ifdef CONFIG_CMD_USB
182 static void taurus_usb_hw_init(void)
184 at91_periph_clk_enable(ATMEL_ID_PIODE);
186 at91_set_gpio_output(AT91_PIN_PD1, 0);
187 at91_set_gpio_output(AT91_PIN_PD3, 0);
192 static void corvus_macb_hw_init(void)
195 at91_periph_clk_enable(ATMEL_ID_EMAC);
198 * Disable pull-up on:
199 * RXDV (PA15) => PHY normal mode (not Test mode)
200 * ERX0 (PA12) => PHY ADDR0
201 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
203 * PHY has internal pull-down
205 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
206 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
207 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
211 /* Re-enable pull-up */
212 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
213 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
214 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
221 int board_early_init_f(void)
223 at91_seriald_hw_init();
224 corvus_request_gpio();
228 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
229 /* from ./arch/arm/mach-at91/armv7/sama5d3_devices.c */
230 void at91_udp_hw_init(void)
232 /* Enable UPLL clock */
233 at91_upll_clk_enable();
235 /* Enable UDPHS clock */
236 at91_periph_clk_enable(ATMEL_ID_UDPHS);
242 /* address of boot parameters */
243 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
245 /* we have to request the gpios again after relocation */
246 corvus_request_gpio();
247 #ifdef CONFIG_CMD_NAND
248 corvus_nand_hw_init();
250 #ifdef CONFIG_ATMEL_SPI
251 at91_spi0_hw_init(1 << 4);
253 #ifdef CONFIG_HAS_DATAFLASH
254 at91_spi0_hw_init(1 << 0);
257 corvus_macb_hw_init();
259 #ifdef CONFIG_CMD_USB
260 taurus_usb_hw_init();
262 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
264 usba_udc_probe(&pdata);
271 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
272 CONFIG_SYS_SDRAM_SIZE);
276 #ifndef CONFIG_DM_ETH
277 int board_eth_init(bd_t *bis)
281 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
287 /* SPI chip select control */
288 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
290 return bus == 0 && cs < 2;
293 void spi_cs_activate(struct spi_slave *slave)
297 at91_set_gpio_output(AT91_PIN_PB18, 0);
301 at91_set_gpio_output(AT91_PIN_PB3, 0);
306 void spi_cs_deactivate(struct spi_slave *slave)
310 at91_set_gpio_output(AT91_PIN_PB18, 1);
314 at91_set_gpio_output(AT91_PIN_PB3, 1);
319 static struct atmel_serial_platdata at91sam9260_serial_plat = {
320 .base_addr = ATMEL_BASE_DBGU,
323 U_BOOT_DEVICE(at91sam9260_serial) = {
324 .name = "serial_atmel",
325 .platdata = &at91sam9260_serial_plat,