2 * Copyright (C) 2013 Boundary Devices
3 * Copyright (C) 2013 SolidRun ltd.
4 * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 /* set the default clock gate to save power */
10 DATA 4, CCM_CCGR0, 0x00C03F3F
11 DATA 4, CCM_CCGR1, 0x0030FC03
12 DATA 4, CCM_CCGR2, 0x0FFFC000
13 DATA 4, CCM_CCGR3, 0x3FF00000
14 DATA 4, CCM_CCGR4, 0x00FFF300
15 DATA 4, CCM_CCGR5, 0x0F0000C3
16 DATA 4, CCM_CCGR6, 0x000003FF
18 /* enable AXI cache for VDOA/VPU/IPU */
19 DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
20 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
21 DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
22 DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
25 * Setup CCM_CCOSR register as follows:
27 * cko1_en = 1 --> CKO1 enabled
28 * cko1_div = 111 --> divide by 8
29 * cko1_sel = 1011 --> ahb_clk_root
31 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
33 DATA 4, CCM_CCOSR, 0x000000fb