4 prompt "Sunxi SoC Variant"
7 bool "sun4i (Allwinner A10)"
12 bool "sun5i (Allwinner A13)"
17 bool "sun6i (Allwinner A31)"
22 bool "sun7i (Allwinner A20)"
24 select CPU_V7_HAS_NONSEC
25 select CPU_V7_HAS_VIRT
27 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
30 bool "sun8i (Allwinner A23)"
37 int "sunxi dram clock speed"
38 default 312 if MACH_SUN6I || MACH_SUN8I
39 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
41 Set the dram clock speed, valid range 240 - 480, must be a multiple
44 if MACH_SUN5I || MACH_SUN7I
46 int "sunxi mbus clock speed"
49 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
54 int "sunxi dram zq value"
55 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
56 default 127 if MACH_SUN7I
58 Set the dram zq value.
60 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
62 int "sunxi dram emr1 value"
63 default 0 if MACH_SUN4I
64 default 4 if MACH_SUN5I || MACH_SUN7I
66 Set the dram controller emr1 value.
69 int "sunxi dram odt_en value"
72 Set the dram controller odt_en parameter. This can be used to
73 enable/disable the ODT feature.
76 hex "sunxi dram tpr3 value"
79 Set the dram controller tpr3 parameter. This parameter configures
80 the delay on the command lane and also phase shifts, which are
81 applied for sampling incoming read data. The default value 0
82 means that no phase/delay adjustments are necessary. Properly
83 configuring this parameter increases reliability at high DRAM
86 config DRAM_DQS_GATING_DELAY
87 hex "sunxi dram dqs_gating_delay value"
90 Set the dram controller dqs_gating_delay parmeter. Each byte
91 encodes the DQS gating delay for each byte lane. The delay
92 granularity is 1/4 cycle. For example, the value 0x05060606
93 means that the delay is 5 quarter-cycles for one lane (1.25
94 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
95 The default value 0 means autodetection. The results of hardware
96 autodetection are not very reliable and depend on the chip
97 temperature (sometimes producing different results on cold start
98 and warm reboot). But the accuracy of hardware autodetection
99 is usually good enough, unless running at really high DRAM
100 clocks speeds (up to 600MHz). If unsure, keep as 0.
103 prompt "sunxi dram timings"
104 default DRAM_TIMINGS_VENDOR_MAGIC
106 Select the timings of the DDR3 chips.
108 config DRAM_TIMINGS_VENDOR_MAGIC
109 bool "Magic vendor timings from Android"
111 The same DRAM timings as in the Allwinner boot0 bootloader.
113 config DRAM_TIMINGS_DDR3_1066F_1333H
114 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
116 Use the timings of the standard JEDEC DDR3-1066F speed bin for
117 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
118 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
119 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
120 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
121 that down binning to DDR3-1066F is supported (because DDR3-1066F
122 uses a bit faster timings than DDR3-1333H).
124 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
125 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
127 Use the timings of the slowest possible JEDEC speed bin for the
128 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
129 DDR3-800E, DDR3-1066G or DDR3-1333J.
135 config SYS_CONFIG_NAME
136 default "sun4i" if MACH_SUN4I
137 default "sun5i" if MACH_SUN5I
138 default "sun6i" if MACH_SUN6I
139 default "sun7i" if MACH_SUN7I
140 default "sun8i" if MACH_SUN8I
149 bool "SPL/FEL mode support"
153 This enables support for Fast Early Loader (FEL) mode. This
154 allows U-Boot to be loaded to the board over USB by the on-chip
155 boot rom. U-Boot should be sent in two parts: SPL first, with
156 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
157 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
158 shrinks the amount of SRAM available to SPL, so only enable it if
159 you need FEL. Note that enabling this option only allows FEL to be
160 used; it is still possible to boot U-Boot from boot media. U-Boot
161 SPL detects when it is being loaded using FEL.
164 bool "UART0 on MicroSD breakout board"
168 Repurpose the SD card slot for getting access to the UART0 serial
169 console. Primarily useful only for low level u-boot debugging on
170 tablets, where normal UART0 is difficult to access and requires
171 device disassembly and/or soldering. As the SD card can't be used
172 at the same time, the system can be only booted in the FEL mode.
173 Only enable this if you really know what you are doing.
176 string "Default fdtfile env setting for this board"
178 config OLD_SUNXI_KERNEL_COMPAT
179 boolean "Enable workarounds for booting old kernels"
182 Set this to enable various workarounds for old kernels, this results in
183 sub-optimal settings for newer kernels, only enable if needed.
186 string "Card detect pin for mmc0"
189 Set the card detect pin for mmc0, leave empty to not use cd. This
190 takes a string in the format understood by sunxi_name_to_gpio, e.g.
191 PH1 for pin 1 of port H.
194 string "Card detect pin for mmc1"
197 See MMC0_CD_PIN help text.
200 string "Card detect pin for mmc2"
203 See MMC0_CD_PIN help text.
206 string "Card detect pin for mmc3"
209 See MMC0_CD_PIN help text.
211 config MMC_SUNXI_SLOT_EXTRA
212 int "mmc extra slot number"
215 sunxi builds always enable mmc0, some boards also have a second sdcard
216 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
220 string "Vbus enable pin for usb0 (otg)"
223 Set the Vbus enable pin for usb0 (otg). This takes a string in the
224 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
227 string "Vbus enable pin for usb1 (ehci0)"
228 default "PH6" if MACH_SUN4I || MACH_SUN7I
229 default "PH27" if MACH_SUN6I
231 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
232 a string in the format understood by sunxi_name_to_gpio, e.g.
233 PH1 for pin 1 of port H.
236 string "Vbus enable pin for usb2 (ehci1)"
237 default "PH3" if MACH_SUN4I || MACH_SUN7I
238 default "PH24" if MACH_SUN6I
240 See USB1_VBUS_PIN help text.
243 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
246 Say Y here to add support for using a cfb console on the HDMI, LCD
247 or VGA output found on most sunxi devices. See doc/README.video for
248 info on how to select the video output and mode.
251 boolean "HDMI output support"
252 depends on VIDEO && !MACH_SUN8I
255 Say Y here to add support for outputting video over HDMI.
258 boolean "VGA output support"
259 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
262 Say Y here to add support for outputting video over VGA.
264 config VIDEO_VGA_VIA_LCD
265 boolean "VGA via LCD controller support"
266 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
269 Say Y here to add support for external DACs connected to the parallel
270 LCD interface driving a VGA connector, such as found on the
273 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
274 boolean "Force sync active high for VGA via LCD controller support"
275 depends on VIDEO_VGA_VIA_LCD
278 Say Y here if you've a board which uses opendrain drivers for the vga
279 hsync and vsync signals. Opendrain drivers cannot generate steep enough
280 positive edges for a stable video output, so on boards with opendrain
281 drivers the sync signals must always be active high.
283 config VIDEO_VGA_EXTERNAL_DAC_EN
284 string "LCD panel power enable pin"
285 depends on VIDEO_VGA_VIA_LCD
288 Set the enable pin for the external VGA DAC. This takes a string in the
289 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
291 config VIDEO_LCD_MODE
292 string "LCD panel timing details"
296 LCD panel timing details string, leave empty if there is no LCD panel.
297 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
298 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
300 config VIDEO_LCD_DCLK_PHASE
301 int "LCD panel display clock phase"
305 Select LCD panel display clock phase shift, range 0-3.
307 config VIDEO_LCD_POWER
308 string "LCD panel power enable pin"
312 Set the power enable pin for the LCD panel. This takes a string in the
313 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
315 config VIDEO_LCD_RESET
316 string "LCD panel reset pin"
320 Set the reset pin for the LCD panel. This takes a string in the format
321 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
323 config VIDEO_LCD_BL_EN
324 string "LCD panel backlight enable pin"
328 Set the backlight enable pin for the LCD panel. This takes a string in the
329 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
332 config VIDEO_LCD_BL_PWM
333 string "LCD panel backlight pwm pin"
337 Set the backlight pwm pin for the LCD panel. This takes a string in the
338 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
340 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
341 bool "LCD panel backlight pwm is inverted"
345 Set this if the backlight pwm output is active low.
347 config VIDEO_LCD_PANEL_I2C
348 bool "LCD panel needs to be configured via i2c"
352 Say y here if the LCD panel needs to be configured via i2c. This
353 will add a bitbang i2c controller using gpios to talk to the LCD.
355 config VIDEO_LCD_PANEL_I2C_SDA
356 string "LCD panel i2c interface SDA pin"
357 depends on VIDEO_LCD_PANEL_I2C
360 Set the SDA pin for the LCD i2c interface. This takes a string in the
361 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
363 config VIDEO_LCD_PANEL_I2C_SCL
364 string "LCD panel i2c interface SCL pin"
365 depends on VIDEO_LCD_PANEL_I2C
368 Set the SCL pin for the LCD i2c interface. This takes a string in the
369 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
372 # Note only one of these may be selected at a time! But hidden choices are
373 # not supported by Kconfig
374 config VIDEO_LCD_IF_PARALLEL
377 config VIDEO_LCD_IF_LVDS
382 prompt "LCD panel support"
385 Select which type of LCD panel to support.
387 config VIDEO_LCD_PANEL_PARALLEL
388 bool "Generic parallel interface LCD panel"
389 select VIDEO_LCD_IF_PARALLEL
391 config VIDEO_LCD_PANEL_LVDS
392 bool "Generic lvds interface LCD panel"
393 select VIDEO_LCD_IF_LVDS
395 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
396 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
397 select VIDEO_LCD_SSD2828
398 select VIDEO_LCD_IF_PARALLEL
400 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
402 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
403 bool "Hitachi tx18d42vm LCD panel"
404 select VIDEO_LCD_HITACHI_TX18D42VM
405 select VIDEO_LCD_IF_LVDS
407 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
409 config VIDEO_LCD_TL059WV5C0
410 bool "tl059wv5c0 LCD panel"
411 select VIDEO_LCD_PANEL_I2C
412 select VIDEO_LCD_IF_PARALLEL
414 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
415 Aigo M60/M608/M606 tablets.
420 config USB_MUSB_SUNXI
421 bool "Enable sunxi OTG / DRC USB controller in host mode"
424 Say y here to enable support for the sunxi OTG / DRC USB controller
425 used on almost all sunxi boards. Note currently u-boot can only have
426 one usb host controller enabled at a time, so enabling this on boards
427 which also use the ehci host controller will result in build errors.
430 boolean "Enable USB keyboard support"
433 Say Y here to add support for using a USB keyboard (typically used
434 in combination with a graphical console).
437 int "GMAC Transmit Clock Delay Chain"
440 Set the GMAC Transmit Clock Delay Chain value.