git.sur5r.net Git - u-boot/blob - board/ti/dra7xx/mux_data.h

   1 /*
   2  * (C) Copyright 2013
   3  * Texas Instruments Incorporated, <www.ti.com>
   4  *
   5  * Sricharan R  <r.sricharan@ti.com>
   6  * Nishant Kamat <nskamat@ti.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 #ifndef _MUX_DATA_DRA7XX_H_
  11 #define _MUX_DATA_DRA7XX_H_
  12
  13 #include <asm/arch/mux_dra7xx.h>
  14
  15 const struct pad_conf_entry dra72x_core_padconf_array_common[] = {
  16         {GPMC_AD0, (M3 | PIN_INPUT)},   /* gpmc_ad0.vout3_d0 */
  17         {GPMC_AD1, (M3 | PIN_INPUT)},   /* gpmc_ad1.vout3_d1 */
  18         {GPMC_AD2, (M3 | PIN_INPUT)},   /* gpmc_ad2.vout3_d2 */
  19         {GPMC_AD3, (M3 | PIN_INPUT)},   /* gpmc_ad3.vout3_d3 */
  20         {GPMC_AD4, (M3 | PIN_INPUT)},   /* gpmc_ad4.vout3_d4 */
  21         {GPMC_AD5, (M3 | PIN_INPUT)},   /* gpmc_ad5.vout3_d5 */
  22         {GPMC_AD6, (M3 | PIN_INPUT)},   /* gpmc_ad6.vout3_d6 */
  23         {GPMC_AD7, (M3 | PIN_INPUT)},   /* gpmc_ad7.vout3_d7 */
  24         {GPMC_AD8, (M3 | PIN_INPUT)},   /* gpmc_ad8.vout3_d8 */
  25         {GPMC_AD9, (M3 | PIN_INPUT)},   /* gpmc_ad9.vout3_d9 */
  26         {GPMC_AD10, (M3 | PIN_INPUT)},  /* gpmc_ad10.vout3_d10 */
  27         {GPMC_AD11, (M3 | PIN_INPUT)},  /* gpmc_ad11.vout3_d11 */
  28         {GPMC_AD12, (M3 | PIN_INPUT)},  /* gpmc_ad12.vout3_d12 */
  29         {GPMC_AD13, (M3 | PIN_INPUT)},  /* gpmc_ad13.vout3_d13 */
  30         {GPMC_AD14, (M3 | PIN_INPUT)},  /* gpmc_ad14.vout3_d14 */
  31         {GPMC_AD15, (M3 | PIN_INPUT)},  /* gpmc_ad15.vout3_d15 */
  32         {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a0.vout3_d16 */
  33         {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a1.vout3_d17 */
  34         {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a2.vout3_d18 */
  35         {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a3.vout3_d19 */
  36         {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a4.vout3_d20 */
  37         {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a5.vout3_d21 */
  38         {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a6.vout3_d22 */
  39         {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a7.vout3_d23 */
  40         {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a8.vout3_hsync */
  41         {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a9.vout3_vsync */
  42         {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},  /* gpmc_a10.vout3_de */
  43         {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */
  44         {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */
  45         {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */
  46         {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */
  47         {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */
  48         {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */
  49         {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */
  50         {GPMC_A19, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a19.mmc2_dat4 */
  51         {GPMC_A20, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a20.mmc2_dat5 */
  52         {GPMC_A21, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a21.mmc2_dat6 */
  53         {GPMC_A22, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a22.mmc2_dat7 */
  54         {GPMC_A23, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a23.mmc2_clk */
  55         {GPMC_A24, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a24.mmc2_dat0 */
  56         {GPMC_A25, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a25.mmc2_dat1 */
  57         {GPMC_A26, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a26.mmc2_dat2 */
  58         {GPMC_A27, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a27.mmc2_dat3 */
  59         {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_cs1.mmc2_cmd */
  60         {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */
  61         {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},    /* gpmc_cs3.vout3_clk */
  62         {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},        /* vin2a_clk0.vin2a_clk0 */
  63         {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},      /* vin2a_hsync0.vin2a_hsync0 */
  64         {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},      /* vin2a_vsync0.vin2a_vsync0 */
  65         {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */
  66         {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */
  67         {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */
  68         {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},  /* vin2a_d3.vin2a_d3 */
  69         {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},  /* vin2a_d4.vin2a_d4 */
  70         {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},  /* vin2a_d5.vin2a_d5 */
  71         {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},  /* vin2a_d6.vin2a_d6 */
  72         {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},  /* vin2a_d7.vin2a_d7 */
  73         {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},  /* vin2a_d8.vin2a_d8 */
  74         {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},  /* vin2a_d9.vin2a_d9 */
  75         {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */
  76         {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */
  77         {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */
  78         {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_de.vout1_de */
  79         {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */
  80         {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},       /* vout1_vsync.vout1_vsync */
  81         {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d0.vout1_d0 */
  82         {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d1.vout1_d1 */
  83         {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d2.vout1_d2 */
  84         {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d3.vout1_d3 */
  85         {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d4.vout1_d4 */
  86         {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d5.vout1_d5 */
  87         {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d6.vout1_d6 */
  88         {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d7.vout1_d7 */
  89         {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d8.vout1_d8 */
  90         {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d9.vout1_d9 */
  91         {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */
  92         {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */
  93         {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */
  94         {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */
  95         {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */
  96         {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */
  97         {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */
  98         {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */
  99         {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */
 100         {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */
 101         {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */
 102         {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */
 103         {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */
 104         {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */
 105         {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* mdio_mclk.mdio_mclk */
 106         {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},        /* mdio_d.mdio_d */
 107         {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},  /* usb1_drvvbus.usb1_drvvbus */
 108         {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},  /* usb2_drvvbus.usb2_drvvbus */
 109         {GPIO6_14, (M9 | PIN_INPUT_PULLUP)},    /* gpio6_14.i2c3_sda */
 110         {GPIO6_15, (M9 | PIN_INPUT_PULLUP)},    /* gpio6_15.i2c3_scl */
 111         {GPIO6_16, (M14 | PIN_INPUT_PULLUP)},   /* gpio6_16.gpio6_16 */
 112         {MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)},  /* mcasp1_axr0.i2c5_sda */
 113         {MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)},  /* mcasp1_axr1.i2c5_scl */
 114         {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr2.gpio5_4 */
 115         {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr3.gpio5_5 */
 116         {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr4.gpio5_6 */
 117         {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr5.gpio5_7 */
 118         {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr6.gpio5_8 */
 119         {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr7.gpio5_9 */
 120         {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */
 121         {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},  /* mcasp1_axr13.mcasp7_axr1 */
 122         {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */
 123         {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */
 124         {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},      /* mcasp2_aclkr.mcasp2_aclkr */
 125         {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},      /* mcasp3_aclkx.mcasp3_aclkx */
 126         {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},    /* mcasp3_fsx.mcasp3_fsx */
 127         {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},   /* mcasp3_axr0.mcasp3_axr0 */
 128         {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},   /* mcasp3_axr1.mcasp3_axr1 */
 129         {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},    /* mmc1_clk.mmc1_clk */
 130         {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},    /* mmc1_cmd.mmc1_cmd */
 131         {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat0.mmc1_dat0 */
 132         {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat1.mmc1_dat1 */
 133         {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat2.mmc1_dat2 */
 134         {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat3.mmc1_dat3 */
 135         {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},  /* mmc1_sdcd.gpio6_27 */
 136         {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},    /* mmc1_sdwp.gpio6_28 */
 137         {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */
 138         {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},   /* spi1_d1.spi1_d1 */
 139         {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},   /* spi1_d0.spi1_d0 */
 140         {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},    /* spi1_cs0.spi1_cs0 */
 141         {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */
 142         {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
 143         {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)},      /* spi1_cs3.hdmi1_cec */
 144         {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
 145         {SPI2_D1, (M1 | PIN_INPUT_SLEW)},       /* spi2_d1.uart3_txd */
 146         {SPI2_D0, (M1 | PIN_INPUT_SLEW)},       /* spi2_d0.uart3_ctsn */
 147         {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},      /* spi2_cs0.uart3_rtsn */
 148         {DCAN1_TX, (M15 | PULL_UP)},    /* dcan1_tx.safe for dcan1_tx */
 149         {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* dcan1_rx.gpio1_15 */
 150         {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* uart1_rxd.uart1_rxd */
 151         {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* uart1_txd.uart1_txd */
 152         {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart1_ctsn.mmc4_clk */
 153         {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart1_rtsn.mmc4_cmd */
 154         {UART2_RXD, (M3 | PIN_INPUT_PULLUP)},   /* uart2_rxd.mmc4_dat0 */
 155         {UART2_TXD, (M3 | PIN_INPUT_PULLUP)},   /* uart2_txd.mmc4_dat1 */
 156         {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart2_ctsn.mmc4_dat2 */
 157         {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart2_rtsn.mmc4_dat3 */
 158         {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},    /* i2c2_sda.hdmi1_ddc_scl */
 159         {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},    /* i2c2_scl.hdmi1_ddc_sda */
 160         {WAKEUP0, (M15 | PULL_UP)},     /* Wakeup0.safe for dcan1_rx */
 161         {WAKEUP3, (M1 | PULL_ENA | PULL_UP)},   /* Wakeup3.sys_nirq1 */
 162 };
 163
 164 const struct pad_conf_entry dra72x_rgmii_padconf_array_revb[] = {
 165         {GPIO6_11, (M14 | PIN_INPUT_PULLUP)},   /* gpio6_11.gpio6_11 */
 166         {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},  /* rgmii0_txc.rgmii0_txc */
 167         {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},        /* rgmii0_txctl.rgmii0_txctl */
 168         {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */
 169         {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */
 170         {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */
 171         {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */
 172         {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},   /* rgmii0_rxc.rgmii0_rxc */
 173         {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */
 174         {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},  /* rgmii0_rxd3.rgmii0_rxd3 */
 175         {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},  /* rgmii0_rxd2.rgmii0_rxd2 */
 176         {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},  /* rgmii0_rxd1.rgmii0_rxd1 */
 177         {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},  /* rgmii0_rxd0.rgmii0_rxd0 */
 178         {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},   /* vin2a_d0.rgmii1_txc */
 179         {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},   /* vin2a_d1.rgmii1_txctl */
 180         {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},   /* vin2a_d2.rgmii1_txd3 */
 181         {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},   /* vin2a_d3.rgmii1_txd2 */
 182         {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},   /* vin2a_d4.rgmii1_txd1 */
 183         {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},   /* vin2a_d5.rgmii1_txd0 */
 184         {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)},    /* vin2a_d6.rgmii1_rxc */
 185         {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)},    /* vin2a_d7.rgmii1_rxctl */
 186         {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)},    /* vin2a_d8.rgmii1_rxd3 */
 187         {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)},    /* vin2a_d9.rgmii1_rxd2 */
 188         {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)},    /* vin2a_d10.rgmii1_rxd1 */
 189         {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)},    /* vin2a_d11.rgmii1_rxd0 */
 190         {XREF_CLK1, (M5 | PIN_OUTPUT)}, /* xref_clk1.atl_clk1 */
 191         {XREF_CLK2, (M5 | PIN_OUTPUT)}, /* xref_clk2.atl_clk2 */
 192 };
 193
 194 const struct pad_conf_entry dra72x_rgmii_padconf_array_revc[] = {
 195         {VIN2A_FLD0, (M14 | PIN_INPUT)},        /* vin2a_fld0.gpio3_30 */
 196         {RGMII0_TXC, (M0 | PIN_OUTPUT)},        /* rgmii0_txc.rgmii0_txc */
 197         {RGMII0_TXCTL, (M0 | PIN_OUTPUT)},      /* rgmii0_txctl.rgmii0_txctl */
 198         {RGMII0_TXD3, (M0 | PIN_OUTPUT)},       /* rgmii0_txd3.rgmii0_txd3 */
 199         {RGMII0_TXD2, (M0 | PIN_OUTPUT)},       /* rgmii0_txd2.rgmii0_txd2 */
 200         {RGMII0_TXD1, (M0 | PIN_OUTPUT)},       /* rgmii0_txd1.rgmii0_txd1 */
 201         {RGMII0_TXD0, (M0 | PIN_OUTPUT)},       /* rgmii0_txd0.rgmii0_txd0 */
 202         {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN)},        /* rgmii0_rxc.rgmii0_rxc */
 203         {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN)},      /* rgmii0_rxctl.rgmii0_rxctl */
 204         {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN)},       /* rgmii0_rxd3.rgmii0_rxd3 */
 205         {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN)},       /* rgmii0_rxd2.rgmii0_rxd2 */
 206         {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN)},       /* rgmii0_rxd1.rgmii0_rxd1 */
 207         {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN)},       /* rgmii0_rxd0.rgmii0_rxd0 */
 208         {VIN2A_D12, (M3 | PIN_OUTPUT)}, /* vin2a_d12.rgmii1_txc */
 209         {VIN2A_D13, (M3 | PIN_OUTPUT)}, /* vin2a_d13.rgmii1_txctl */
 210         {VIN2A_D14, (M3 | PIN_OUTPUT)}, /* vin2a_d14.rgmii1_txd3 */
 211         {VIN2A_D15, (M3 | PIN_OUTPUT)}, /* vin2a_d15.rgmii1_txd2 */
 212         {VIN2A_D16, (M3 | PIN_OUTPUT)}, /* vin2a_d16.rgmii1_txd1 */
 213         {VIN2A_D17, (M3 | PIN_OUTPUT)}, /* vin2a_d17.rgmii1_txd0 */
 214         {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_d18.rgmii1_rxc */
 215         {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_d19.rgmii1_rxctl */
 216         {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_d20.rgmii1_rxd3 */
 217         {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_d21.rgmii1_rxd2 */
 218         {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_d22.rgmii1_rxd1 */
 219         {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_d23.rgmii1_rxd0 */
 220         {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */
 221 };
 222
 223 const struct pad_conf_entry early_padconf[] = {
 224 #if (CONFIG_CONS_INDEX == 1)
 225         {UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */
 226         {UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */
 227 #elif (CONFIG_CONS_INDEX == 3)
 228         {UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */
 229         {UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */
 230 #endif
 231         {I2C1_SDA, (PIN_INPUT | M0)},   /* I2C1_SDA */
 232         {I2C1_SCL, (PIN_INPUT | M0)},   /* I2C1_SCL */
 233 };
 234
 235 #ifdef CONFIG_IODELAY_RECALIBRATION
 236 const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = {
 237         {0x6F0, 359, 0}, /* RGMMI0_RXC_IN */
 238         {0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */
 239         {0x708, 80, 1391}, /* RGMMI0_RXD0_IN */
 240         {0x714, 196, 1522}, /* RGMMI0_RXD1_IN */
 241         {0x720, 40, 1860}, /* RGMMI0_RXD2_IN */
 242         {0x72C, 0, 1956}, /* RGMMI0_RXD3_IN */
 243         {0x740, 0, 220}, /* RGMMI0_TXC_OUT */
 244         {0x74C, 1820, 180}, /* RGMMI0_TXCTL_OUT */
 245         {0x758, 1740, 440}, /* RGMMI0_TXD0_OUT */
 246         {0x764, 1740, 240}, /* RGMMI0_TXD1_OUT */
 247         {0x770, 1680, 380}, /* RGMMI0_TXD2_OUT */
 248         {0x77C, 1740, 440}, /* RGMMI0_TXD3_OUT */
 249         /* These values are for using RGMII1 configuration on VIN2a_x pins. */
 250         {0xAB0, 596, 0}, /* CFG_VIN2A_D18_IN */
 251         {0xABC, 314, 980}, /* CFG_VIN2A_D19_IN */
 252         {0xAD4, 241, 1536}, /* CFG_VIN2A_D20_IN */
 253         {0xAE0, 103, 1689}, /* CFG_VIN2A_D21_IN */
 254         {0xAEC, 161, 1563}, /* CFG_VIN2A_D22_IN */
 255         {0xAF8, 0, 1613}, /* CFG_VIN2A_D23_IN */
 256         {0xA70, 0, 200}, /* CFG_VIN2A_D12_OUT */
 257         {0xA7C, 1560, 140}, /* CFG_VIN2A_D13_OUT */
 258         {0xA88, 1700, 0}, /* CFG_VIN2A_D14_OUT */
 259         {0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */
 260         {0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */
 261         {0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */
 262         {0x144, 0, 0}, /* CFG_GPMC_A13_IN */
 263         {0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */
 264         {0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */
 265         {0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */
 266         {0x170, 0, 0 }, /* CFG_GPMC_A16_OUT */
 267         {0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */
 268         {0x188, 0, 0}, /* CFG_GPMC_A18_OUT */
 269         {0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */
 270 };
 271
 272 const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revc[] = {
 273         {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */
 274         {0x0150, 2247, 1186},   /* CFG_GPMC_A14_IN */
 275         {0x015C, 2176, 1197},   /* CFG_GPMC_A15_IN */
 276         {0x0168, 2229, 1268},   /* CFG_GPMC_A16_IN */
 277         {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */
 278         {0x0174, 2251, 1217},   /* CFG_GPMC_A17_IN */
 279         {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */
 280         {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */
 281 };
 282
 283 #endif
 284
 285 const struct pad_conf_entry dra74x_core_padconf_array[] = {
 286         {GPMC_AD0, (M3 | PIN_INPUT)},   /* gpmc_ad0.vout3_d0 */
 287         {GPMC_AD1, (M3 | PIN_INPUT)},   /* gpmc_ad1.vout3_d1 */
 288         {GPMC_AD2, (M3 | PIN_INPUT)},   /* gpmc_ad2.vout3_d2 */
 289         {GPMC_AD3, (M3 | PIN_INPUT)},   /* gpmc_ad3.vout3_d3 */
 290         {GPMC_AD4, (M3 | PIN_INPUT)},   /* gpmc_ad4.vout3_d4 */
 291         {GPMC_AD5, (M3 | PIN_INPUT)},   /* gpmc_ad5.vout3_d5 */
 292         {GPMC_AD6, (M3 | PIN_INPUT)},   /* gpmc_ad6.vout3_d6 */
 293         {GPMC_AD7, (M3 | PIN_INPUT)},   /* gpmc_ad7.vout3_d7 */
 294         {GPMC_AD8, (M3 | PIN_INPUT)},   /* gpmc_ad8.vout3_d8 */
 295         {GPMC_AD9, (M3 | PIN_INPUT)},   /* gpmc_ad9.vout3_d9 */
 296         {GPMC_AD10, (M3 | PIN_INPUT)},  /* gpmc_ad10.vout3_d10 */
 297         {GPMC_AD11, (M3 | PIN_INPUT)},  /* gpmc_ad11.vout3_d11 */
 298         {GPMC_AD12, (M3 | PIN_INPUT)},  /* gpmc_ad12.vout3_d12 */
 299         {GPMC_AD13, (M3 | PIN_INPUT)},  /* gpmc_ad13.vout3_d13 */
 300         {GPMC_AD14, (M3 | PIN_INPUT)},  /* gpmc_ad14.vout3_d14 */
 301         {GPMC_AD15, (M3 | PIN_INPUT)},  /* gpmc_ad15.vout3_d15 */
 302         {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a0.vout3_d16 */
 303         {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a1.vout3_d17 */
 304         {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a2.vout3_d18 */
 305         {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a3.vout3_d19 */
 306         {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a4.vout3_d20 */
 307         {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a5.vout3_d21 */
 308         {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a6.vout3_d22 */
 309         {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a7.vout3_d23 */
 310         {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a8.vout3_hsync */
 311         {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},   /* gpmc_a9.vout3_vsync */
 312         {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},  /* gpmc_a10.vout3_de */
 313         {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */
 314         {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* gpmc_a13.qspi1_rtclk */
 315         {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* gpmc_a14.qspi1_d3 */
 316         {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* gpmc_a15.qspi1_d2 */
 317         {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* gpmc_a16.qspi1_d0 */
 318         {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* gpmc_a17.qspi1_d1 */
 319         {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* gpmc_a18.qspi1_sclk */
 320         {GPMC_A19, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a19.mmc2_dat4 */
 321         {GPMC_A20, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a20.mmc2_dat5 */
 322         {GPMC_A21, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a21.mmc2_dat6 */
 323         {GPMC_A22, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a22.mmc2_dat7 */
 324         {GPMC_A23, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a23.mmc2_clk */
 325         {GPMC_A24, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a24.mmc2_dat0 */
 326         {GPMC_A25, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a25.mmc2_dat1 */
 327         {GPMC_A26, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a26.mmc2_dat2 */
 328         {GPMC_A27, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_a27.mmc2_dat3 */
 329         {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},    /* gpmc_cs1.mmc2_cmd */
 330         {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},      /* gpmc_cs2.qspi1_cs0 */
 331         {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},    /* gpmc_cs3.vout3_clk */
 332         {VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},  /* vin1a_clk0.vin1a_clk0 */
 333         {VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_de0.vin1a_de0 */
 334         {VIN1A_FLD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},  /* vin1a_fld0.vin1a_fld0 */
 335         {VIN1A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},        /* vin1a_hsync0.vin1a_hsync0 */
 336         {VIN1A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},        /* vin1a_vsync0.vin1a_vsync0 */
 337         {VIN1A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d0.vin1a_d0 */
 338         {VIN1A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d1.vin1a_d1 */
 339         {VIN1A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d2.vin1a_d2 */
 340         {VIN1A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d3.vin1a_d3 */
 341         {VIN1A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d4.vin1a_d4 */
 342         {VIN1A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d5.vin1a_d5 */
 343         {VIN1A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d6.vin1a_d6 */
 344         {VIN1A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d7.vin1a_d7 */
 345         {VIN1A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d8.vin1a_d8 */
 346         {VIN1A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},    /* vin1a_d9.vin1a_d9 */
 347         {VIN1A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d10.vin1a_d10 */
 348         {VIN1A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d11.vin1a_d11 */
 349         {VIN1A_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d12.vin1a_d12 */
 350         {VIN1A_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d13.vin1a_d13 */
 351         {VIN1A_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d14.vin1a_d14 */
 352         {VIN1A_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d15.vin1a_d15 */
 353         {VIN1A_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d16.vin1a_d16 */
 354         {VIN1A_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d17.vin1a_d17 */
 355         {VIN1A_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d18.vin1a_d18 */
 356         {VIN1A_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d19.vin1a_d19 */
 357         {VIN1A_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d20.vin1a_d20 */
 358         {VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d21.vin1a_d21 */
 359         {VIN1A_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d22.vin1a_d22 */
 360         {VIN1A_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin1a_d23.vin1a_d23 */
 361         {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d12.rgmii1_txc */
 362         {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d13.rgmii1_txctl */
 363         {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d14.rgmii1_txd3 */
 364         {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d15.rgmii1_txd2 */
 365         {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d16.rgmii1_txd1 */
 366         {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d17.rgmii1_txd0 */
 367         {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d18.rgmii1_rxc */
 368         {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d19.rgmii1_rxctl */
 369         {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d20.rgmii1_rxd3 */
 370         {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d21.rgmii1_rxd2 */
 371         {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d22.rgmii1_rxd1 */
 372         {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d23.rgmii1_rxd0 */
 373         {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */
 374         {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_de.vout1_de */
 375         {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)},       /* vout1_hsync.vout1_hsync */
 376         {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},       /* vout1_vsync.vout1_vsync */
 377         {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d0.vout1_d0 */
 378         {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d1.vout1_d1 */
 379         {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d2.vout1_d2 */
 380         {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d3.vout1_d3 */
 381         {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d4.vout1_d4 */
 382         {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d5.vout1_d5 */
 383         {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d6.vout1_d6 */
 384         {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d7.vout1_d7 */
 385         {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d8.vout1_d8 */
 386         {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},  /* vout1_d9.vout1_d9 */
 387         {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */
 388         {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */
 389         {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */
 390         {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */
 391         {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */
 392         {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */
 393         {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */
 394         {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */
 395         {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */
 396         {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */
 397         {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */
 398         {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */
 399         {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */
 400         {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */
 401         {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* mdio_mclk.mdio_mclk */
 402         {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},        /* mdio_d.mdio_d */
 403         {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},  /* rgmii0_txc.rgmii0_txc */
 404         {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},        /* rgmii0_txctl.rgmii0_txctl */
 405         {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */
 406         {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */
 407         {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */
 408         {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */
 409         {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},  /* rgmii0_rxc.rgmii0_rxc */
 410         {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},        /* rgmii0_rxctl.rgmii0_rxctl */
 411         {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */
 412         {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */
 413         {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */
 414         {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */
 415         {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},  /* usb1_drvvbus.usb1_drvvbus */
 416         {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},  /* usb2_drvvbus.usb2_drvvbus */
 417         {GPIO6_14, (M9 | PIN_INPUT_PULLUP)},    /* gpio6_14.i2c3_sda */
 418         {GPIO6_15, (M9 | PIN_INPUT_PULLUP)},    /* gpio6_15.i2c3_scl */
 419         {GPIO6_16, (M14 | PIN_INPUT_PULLUP)},   /* gpio6_16.gpio6_16 */
 420         {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */
 421         {MCASP1_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},      /* mcasp1_aclkx.mcasp1_aclkx */
 422         {MCASP1_FSX, (M0 | PIN_INPUT_SLEW)},    /* mcasp1_fsx.mcasp1_fsx */
 423         {MCASP1_AXR0, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE15)},  /* mcasp1_axr0.mcasp1_axr0 */
 424         {MCASP1_AXR1, (M0 | PIN_INPUT_SLEW)},   /* mcasp1_axr1.mcasp1_axr1 */
 425         {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr2.gpio5_4 */
 426         {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr3.gpio5_5 */
 427         {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr4.gpio5_6 */
 428         {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr5.gpio5_7 */
 429         {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr6.gpio5_8 */
 430         {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},      /* mcasp1_axr7.gpio5_9 */
 431         {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */
 432         {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},  /* mcasp1_axr13.mcasp7_axr1 */
 433         {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */
 434         {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */
 435         {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},      /* mcasp2_aclkr.mcasp2_aclkr */
 436         {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},      /* mcasp3_aclkx.mcasp3_aclkx */
 437         {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},    /* mcasp3_fsx.mcasp3_fsx */
 438         {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},   /* mcasp3_axr0.mcasp3_axr0 */
 439         {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},   /* mcasp3_axr1.mcasp3_axr1 */
 440         {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},    /* mmc1_clk.mmc1_clk */
 441         {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},    /* mmc1_cmd.mmc1_cmd */
 442         {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat0.mmc1_dat0 */
 443         {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat1.mmc1_dat1 */
 444         {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat2.mmc1_dat2 */
 445         {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},   /* mmc1_dat3.mmc1_dat3 */
 446         {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},  /* mmc1_sdcd.gpio6_27 */
 447         {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},    /* mmc1_sdwp.gpio6_28 */
 448         {GPIO6_11, (M14 | PIN_INPUT_PULLUP)},   /* gpio6_11.gpio6_11 */
 449         {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */
 450         {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},   /* spi1_d1.spi1_d1 */
 451         {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},   /* spi1_d0.spi1_d0 */
 452         {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},    /* spi1_cs0.spi1_cs0 */
 453         {SPI1_CS1, (M14 | PIN_OUTPUT)},         /* spi1_cs1.gpio7_11 */
 454         {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
 455         {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)},      /* spi1_cs3.hdmi1_cec */
 456         {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
 457         {SPI2_D1, (M1 | PIN_INPUT_SLEW)},       /* spi2_d1.uart3_txd */
 458         {SPI2_D0, (M1 | PIN_INPUT_SLEW)},       /* spi2_d0.uart3_ctsn */
 459         {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},      /* spi2_cs0.uart3_rtsn */
 460         {DCAN1_TX, (M15 | PULL_UP)},    /* dcan1_tx.safe for dcan1_tx */
 461         {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* dcan1_rx.gpio1_15 */
 462         {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* uart1_rxd.uart1_rxd */
 463         {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},     /* uart1_txd.uart1_txd */
 464         {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart1_ctsn.mmc4_clk */
 465         {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart1_rtsn.mmc4_cmd */
 466         {UART2_RXD, (M3 | PIN_INPUT_PULLUP)},   /* N/A.mmc4_dat0 */
 467         {UART2_TXD, (M3 | PIN_INPUT_PULLUP)},   /* uart2_txd.mmc4_dat1 */
 468         {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart2_ctsn.mmc4_dat2 */
 469         {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},  /* uart2_rtsn.mmc4_dat3 */
 470         {I2C2_SDA, (M0 | PIN_INPUT_PULLUP)},    /* i2c2_sda.i2c2_sda */
 471         {I2C2_SCL, (M0 | PIN_INPUT_PULLUP)},    /* i2c2_scl.i2c2_scl */
 472         {WAKEUP0, (M15 | PULL_UP)},     /* Wakeup0.safe for dcan1_rx */
 473         {WAKEUP2, (M14)},               /* Wakeup2.gpio1_2 */
 474 };
 475
 476 #ifdef CONFIG_IODELAY_RECALIBRATION
 477 const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = {
 478         {0x06F0, 480, 0},       /* CFG_RGMII0_RXC_IN */
 479         {0x06FC, 111, 1641},    /* CFG_RGMII0_RXCTL_IN */
 480         {0x0708, 272, 1116},    /* CFG_RGMII0_RXD0_IN */
 481         {0x0714, 243, 1260},    /* CFG_RGMII0_RXD1_IN */
 482         {0x0720, 0, 1614},      /* CFG_RGMII0_RXD2_IN */
 483         {0x072C, 105, 1673},    /* CFG_RGMII0_RXD3_IN */
 484         {0x0740, 0, 0},         /* CFG_RGMII0_TXC_OUT */
 485         {0x074C, 1560, 120},    /* CFG_RGMII0_TXCTL_OUT */
 486         {0x0758, 1570, 120},    /* CFG_RGMII0_TXD0_OUT */
 487         {0x0764, 1500, 120},    /* CFG_RGMII0_TXD1_OUT */
 488         {0x0770, 1775, 120},    /* CFG_RGMII0_TXD2_OUT */
 489         {0x077C, 1875, 120},    /* CFG_RGMII0_TXD3_OUT */
 490         {0x08D0, 0, 0},         /* CFG_VIN1A_CLK0_IN */
 491         {0x08DC, 2600, 0},      /* CFG_VIN1A_D0_IN */
 492         {0x08E8, 2652, 46},     /* CFG_VIN1A_D10_IN */
 493         {0x08F4, 2541, 0},      /* CFG_VIN1A_D11_IN */
 494         {0x0900, 2603, 574},    /* CFG_VIN1A_D12_IN */
 495         {0x090C, 2548, 443},    /* CFG_VIN1A_D13_IN */
 496         {0x0918, 2624, 598},    /* CFG_VIN1A_D14_IN */
 497         {0x0924, 2535, 1027},   /* CFG_VIN1A_D15_IN */
 498         {0x0930, 2526, 818},    /* CFG_VIN1A_D16_IN */
 499         {0x093C, 2623, 797},    /* CFG_VIN1A_D17_IN */
 500         {0x0948, 2578, 888},    /* CFG_VIN1A_D18_IN */
 501         {0x0954, 2574, 1008},   /* CFG_VIN1A_D19_IN */
 502         {0x0960, 2527, 123},    /* CFG_VIN1A_D1_IN */
 503         {0x096C, 2577, 737},    /* CFG_VIN1A_D20_IN */
 504         {0x0978, 2627, 616},    /* CFG_VIN1A_D21_IN */
 505         {0x0984, 2573, 777},    /* CFG_VIN1A_D22_IN */
 506         {0x0990, 2730, 67},     /* CFG_VIN1A_D23_IN */
 507         {0x099C, 2509, 303},    /* CFG_VIN1A_D2_IN */
 508         {0x09A8, 2494, 267},    /* CFG_VIN1A_D3_IN */
 509         {0x09B4, 2474, 0},      /* CFG_VIN1A_D4_IN */
 510         {0x09C0, 2556, 181},    /* CFG_VIN1A_D5_IN */
 511         {0x09CC, 2516, 195},    /* CFG_VIN1A_D6_IN */
 512         {0x09D8, 2589, 210},    /* CFG_VIN1A_D7_IN */
 513         {0x09E4, 2624, 75},     /* CFG_VIN1A_D8_IN */
 514         {0x09F0, 2704, 14},     /* CFG_VIN1A_D9_IN */
 515         {0x09FC, 2469, 55},     /* CFG_VIN1A_DE0_IN */
 516         {0x0A08, 2557, 264},    /* CFG_VIN1A_FLD0_IN */
 517         {0x0A14, 2465, 269},    /* CFG_VIN1A_HSYNC0_IN */
 518         {0x0A20, 2411, 348},    /* CFG_VIN1A_VSYNC0_IN */
 519         {0x0A70, 150, 0},       /* CFG_VIN2A_D12_OUT */
 520         {0x0A7C, 1500, 0},      /* CFG_VIN2A_D13_OUT */
 521         {0x0A88, 1600, 0},      /* CFG_VIN2A_D14_OUT */
 522         {0x0A94, 900, 0},       /* CFG_VIN2A_D15_OUT */
 523         {0x0AA0, 680, 0},       /* CFG_VIN2A_D16_OUT */
 524         {0x0AAC, 500, 0},       /* CFG_VIN2A_D17_OUT */
 525         {0x0AB0, 702, 0},       /* CFG_VIN2A_D18_IN */
 526         {0x0ABC, 136, 976},     /* CFG_VIN2A_D19_IN */
 527         {0x0AD4, 210, 1357},    /* CFG_VIN2A_D20_IN */
 528         {0x0AE0, 189, 1462},    /* CFG_VIN2A_D21_IN */
 529         {0x0AEC, 232, 1278},    /* CFG_VIN2A_D22_IN */
 530         {0x0AF8, 0, 1397},      /* CFG_VIN2A_D23_IN */
 531         {0x0144, 0, 0},         /* CFG_GPMC_A13_IN */
 532         {0x0150, 1976, 1389},   /* CFG_GPMC_A14_IN */
 533         {0x015C, 1872, 1408},   /* CFG_GPMC_A15_IN */
 534         {0x0168, 1914, 1506},   /* CFG_GPMC_A16_IN */
 535         {0x0170, 57, 0},        /* CFG_GPMC_A16_OUT */
 536         {0x0174, 1904, 1471},   /* CFG_GPMC_A17_IN */
 537         {0x0188, 1690, 0},      /* CFG_GPMC_A18_OUT */
 538         {0x0374, 0, 0},         /* CFG_GPMC_CS2_OUT */
 539 };
 540
 541 const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = {
 542         {0x06F0, 471, 0},       /* CFG_RGMII0_RXC_IN */
 543         {0x06FC, 30, 1919},     /* CFG_RGMII0_RXCTL_IN */
 544         {0x0708, 74, 1688},     /* CFG_RGMII0_RXD0_IN */
 545         {0x0714, 94, 1697},     /* CFG_RGMII0_RXD1_IN */
 546         {0x0720, 0, 1703},      /* CFG_RGMII0_RXD2_IN */
 547         {0x072C, 70, 1804},     /* CFG_RGMII0_RXD3_IN */
 548         {0x0740, 70, 70},       /* CFG_RGMII0_TXC_OUT */
 549         {0x074C, 35, 70},       /* CFG_RGMII0_TXCTL_OUT */
 550         {0x0758, 100, 130},     /* CFG_RGMII0_TXD0_OUT */
 551         {0x0764, 0, 70},        /* CFG_RGMII0_TXD1_OUT */
 552         {0x0770, 0, 0}, /* CFG_RGMII0_TXD2_OUT */
 553         {0x077C, 100, 130},     /* CFG_RGMII0_TXD3_OUT */
 554         {0x08D0, 0, 0}, /* CFG_VIN1A_CLK0_IN */
 555         {0x08DC, 2105, 619},    /* CFG_VIN1A_D0_IN */
 556         {0x08E8, 2107, 739},    /* CFG_VIN1A_D10_IN */
 557         {0x08F4, 2005, 788},    /* CFG_VIN1A_D11_IN */
 558         {0x0900, 2059, 1297},   /* CFG_VIN1A_D12_IN */
 559         {0x090C, 2027, 1141},   /* CFG_VIN1A_D13_IN */
 560         {0x0918, 2071, 1332},   /* CFG_VIN1A_D14_IN */
 561         {0x0924, 1995, 1764},   /* CFG_VIN1A_D15_IN */
 562         {0x0930, 1999, 1542},   /* CFG_VIN1A_D16_IN */
 563         {0x093C, 2072, 1540},   /* CFG_VIN1A_D17_IN */
 564         {0x0948, 2034, 1629},   /* CFG_VIN1A_D18_IN */
 565         {0x0954, 2026, 1761},   /* CFG_VIN1A_D19_IN */
 566         {0x0960, 2017, 757},    /* CFG_VIN1A_D1_IN */
 567         {0x096C, 2037, 1469},   /* CFG_VIN1A_D20_IN */
 568         {0x0978, 2077, 1349},   /* CFG_VIN1A_D21_IN */
 569         {0x0984, 2022, 1545},   /* CFG_VIN1A_D22_IN */
 570         {0x0990, 2168, 784},    /* CFG_VIN1A_D23_IN */
 571         {0x099C, 1996, 962},    /* CFG_VIN1A_D2_IN */
 572         {0x09A8, 1993, 901},    /* CFG_VIN1A_D3_IN */
 573         {0x09B4, 2098, 499},    /* CFG_VIN1A_D4_IN */
 574         {0x09C0, 2038, 844},    /* CFG_VIN1A_D5_IN */
 575         {0x09CC, 2002, 863},    /* CFG_VIN1A_D6_IN */
 576         {0x09D8, 2063, 873},    /* CFG_VIN1A_D7_IN */
 577         {0x09E4, 2088, 759},    /* CFG_VIN1A_D8_IN */
 578         {0x09F0, 2152, 701},    /* CFG_VIN1A_D9_IN */
 579         {0x09FC, 1926, 728},    /* CFG_VIN1A_DE0_IN */
 580         {0x0A08, 2043, 937},    /* CFG_VIN1A_FLD0_IN */
 581         {0x0A14, 1978, 909},    /* CFG_VIN1A_HSYNC0_IN */
 582         {0x0A20, 1926, 987},    /* CFG_VIN1A_VSYNC0_IN */
 583         {0x0A70, 140, 0},       /* CFG_VIN2A_D12_OUT */
 584         {0x0A7C, 90, 70},       /* CFG_VIN2A_D13_OUT */
 585         {0x0A88, 0, 0}, /* CFG_VIN2A_D14_OUT */
 586         {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */
 587         {0x0AA0, 0, 70},        /* CFG_VIN2A_D16_OUT */
 588         {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */
 589         {0x0AB0, 612, 0},       /* CFG_VIN2A_D18_IN */
 590         {0x0ABC, 4, 927},       /* CFG_VIN2A_D19_IN */
 591         {0x0AD4, 136, 1340},    /* CFG_VIN2A_D20_IN */
 592         {0x0AE0, 130, 1450},    /* CFG_VIN2A_D21_IN */
 593         {0x0AEC, 144, 1269},    /* CFG_VIN2A_D22_IN */
 594         {0x0AF8, 0, 1330},      /* CFG_VIN2A_D23_IN */
 595         {0x0144, 0, 0},         /* CFG_GPMC_A13_IN */
 596         {0x0150, 2575, 966},    /* CFG_GPMC_A14_IN */
 597         {0x015C, 2503, 889},    /* CFG_GPMC_A15_IN */
 598         {0x0168, 2528, 1007},   /* CFG_GPMC_A16_IN */
 599         {0x0170, 0, 0},         /* CFG_GPMC_A16_OUT */
 600         {0x0174, 2533, 980},    /* CFG_GPMC_A17_IN */
 601         {0x0188, 590, 0},       /* CFG_GPMC_A18_OUT */
 602         {0x0374, 0, 0},         /* CFG_GPMC_CS2_OUT */
 603 };
 604 #endif
 605
 606 #endif /* _MUX_DATA_DRA7XX_H_ */