git.sur5r.net Git - u-boot/blob - board/ti/ks2_evm/board.c

   1 /*
   2  * Keystone : Board initialization
   3  *
   4  * (C) Copyright 2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include "board.h"
  12 #include <spl.h>
  13 #include <exports.h>
  14 #include <fdt_support.h>
  15 #include <asm/arch/ddr3.h>
  16 #include <asm/arch/psc_defs.h>
  17 #include <asm/arch/clock.h>
  18 #include <asm/ti-common/ti-aemif.h>
  19 #include <asm/ti-common/keystone_net.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 #if defined(CONFIG_TI_AEMIF)
  24 static struct aemif_config aemif_configs[] = {
  25         {                       /* CS0 */
  26                 .mode           = AEMIF_MODE_NAND,
  27                 .wr_setup       = 0xf,
  28                 .wr_strobe      = 0x3f,
  29                 .wr_hold        = 7,
  30                 .rd_setup       = 0xf,
  31                 .rd_strobe      = 0x3f,
  32                 .rd_hold        = 7,
  33                 .turn_around    = 3,
  34                 .width          = AEMIF_WIDTH_8,
  35         },
  36 };
  37 #endif
  38
  39 int dram_init(void)
  40 {
  41         u32 ddr3_size;
  42
  43         ddr3_size = ddr3_init();
  44
  45         gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  46                                     CONFIG_MAX_RAM_BANK_SIZE);
  47 #if defined(CONFIG_TI_AEMIF)
  48         if (!board_is_k2g_ice())
  49                 aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
  50 #endif
  51
  52         if (!board_is_k2g_ice()) {
  53                 if (ddr3_size)
  54                         ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
  55                 else
  56                         ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE,
  57                                       gd->ram_size >> 30);
  58         }
  59
  60         return 0;
  61 }
  62
  63 int board_init(void)
  64 {
  65         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  66
  67         return 0;
  68 }
  69
  70 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  71 #ifndef CONFIG_DM_ETH
  72 int get_eth_env_param(char *env_name)
  73 {
  74         char *env;
  75         int res = -1;
  76
  77         env = getenv(env_name);
  78         if (env)
  79                 res = simple_strtol(env, NULL, 0);
  80
  81         return res;
  82 }
  83
  84 int board_eth_init(bd_t *bis)
  85 {
  86         int j;
  87         int res;
  88         int port_num;
  89         char link_type_name[32];
  90
  91         if (cpu_is_k2g())
  92                 writel(KS2_ETHERNET_RGMII, KS2_ETHERNET_CFG);
  93
  94         /* By default, select PA PLL clock as PA clock source */
  95 #ifndef CONFIG_SOC_K2G
  96         if (psc_enable_module(KS2_LPSC_PA))
  97                 return -1;
  98 #endif
  99         if (psc_enable_module(KS2_LPSC_CPGMAC))
 100                 return -1;
 101         if (psc_enable_module(KS2_LPSC_CRYPTO))
 102                 return -1;
 103
 104         if (cpu_is_k2e() || cpu_is_k2l())
 105                 pll_pa_clk_sel();
 106
 107         port_num = get_num_eth_ports();
 108
 109         for (j = 0; j < port_num; j++) {
 110                 sprintf(link_type_name, "sgmii%d_link_type", j);
 111                 res = get_eth_env_param(link_type_name);
 112                 if (res >= 0)
 113                         eth_priv_cfg[j].sgmii_link_type = res;
 114
 115                 keystone2_emac_initialize(&eth_priv_cfg[j]);
 116         }
 117
 118         return 0;
 119 }
 120 #endif
 121 #endif
 122
 123 #ifdef CONFIG_SPL_BUILD
 124 void spl_board_init(void)
 125 {
 126         spl_init_keystone_plls();
 127         preloader_console_init();
 128 }
 129
 130 u32 spl_boot_device(void)
 131 {
 132 #if defined(CONFIG_SPL_SPI_LOAD)
 133         return BOOT_DEVICE_SPI;
 134 #else
 135         puts("Unknown boot device\n");
 136         hang();
 137 #endif
 138 }
 139 #endif
 140
 141 #ifdef CONFIG_OF_BOARD_SETUP
 142 int ft_board_setup(void *blob, bd_t *bd)
 143 {
 144         int lpae;
 145         char *env;
 146         char *endp;
 147         int nbanks;
 148         u64 size[2];
 149         u64 start[2];
 150         int nodeoffset;
 151         u32 ddr3a_size;
 152         int unitrd_fixup = 0;
 153
 154         env = getenv("mem_lpae");
 155         lpae = env && simple_strtol(env, NULL, 0);
 156         env = getenv("uinitrd_fixup");
 157         unitrd_fixup = env && simple_strtol(env, NULL, 0);
 158
 159         ddr3a_size = 0;
 160         if (lpae) {
 161                 ddr3a_size = ddr3_get_size();
 162                 if ((ddr3a_size != 8) && (ddr3a_size != 4))
 163                         ddr3a_size = 0;
 164         }
 165
 166         nbanks = 1;
 167         start[0] = bd->bi_dram[0].start;
 168         size[0]  = bd->bi_dram[0].size;
 169
 170         /* adjust memory start address for LPAE */
 171         if (lpae) {
 172                 start[0] -= CONFIG_SYS_SDRAM_BASE;
 173                 start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
 174         }
 175
 176         if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
 177                 size[1] = ((u64)ddr3a_size - 2) << 30;
 178                 start[1] = 0x880000000;
 179                 nbanks++;
 180         }
 181
 182         /* reserve memory at start of bank */
 183         env = getenv("mem_reserve_head");
 184         if (env) {
 185                 start[0] += ustrtoul(env, &endp, 0);
 186                 size[0] -= ustrtoul(env, &endp, 0);
 187         }
 188
 189         env = getenv("mem_reserve");
 190         if (env)
 191                 size[0] -= ustrtoul(env, &endp, 0);
 192
 193         fdt_fixup_memory_banks(blob, start, size, nbanks);
 194
 195         /* Fix up the initrd */
 196         if (lpae && unitrd_fixup) {
 197                 int err;
 198                 u32 *prop1, *prop2;
 199                 u64 initrd_start, initrd_end;
 200
 201                 nodeoffset = fdt_path_offset(blob, "/chosen");
 202                 if (nodeoffset >= 0) {
 203                         prop1 = (u32 *)fdt_getprop(blob, nodeoffset,
 204                                             "linux,initrd-start", NULL);
 205                         prop2 = (u32 *)fdt_getprop(blob, nodeoffset,
 206                                             "linux,initrd-end", NULL);
 207                         if (prop1 && prop2) {
 208                                 initrd_start = __be32_to_cpu(*prop1);
 209                                 initrd_start -= CONFIG_SYS_SDRAM_BASE;
 210                                 initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
 211                                 initrd_start = __cpu_to_be64(initrd_start);
 212                                 initrd_end = __be32_to_cpu(*prop2);
 213                                 initrd_end -= CONFIG_SYS_SDRAM_BASE;
 214                                 initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
 215                                 initrd_end = __cpu_to_be64(initrd_end);
 216
 217                                 err = fdt_delprop(blob, nodeoffset,
 218                                                   "linux,initrd-start");
 219                                 if (err < 0)
 220                                         puts("error deleting initrd-start\n");
 221
 222                                 err = fdt_delprop(blob, nodeoffset,
 223                                                   "linux,initrd-end");
 224                                 if (err < 0)
 225                                         puts("error deleting initrd-end\n");
 226
 227                                 err = fdt_setprop(blob, nodeoffset,
 228                                                   "linux,initrd-start",
 229                                                   &initrd_start,
 230                                                   sizeof(initrd_start));
 231                                 if (err < 0)
 232                                         puts("error adding initrd-start\n");
 233
 234                                 err = fdt_setprop(blob, nodeoffset,
 235                                                   "linux,initrd-end",
 236                                                   &initrd_end,
 237                                                   sizeof(initrd_end));
 238                                 if (err < 0)
 239                                         puts("error adding linux,initrd-end\n");
 240                         }
 241                 }
 242         }
 243
 244         return 0;
 245 }
 246
 247 void ft_board_setup_ex(void *blob, bd_t *bd)
 248 {
 249         int lpae;
 250         u64 size;
 251         char *env;
 252         u64 *reserve_start;
 253
 254         env = getenv("mem_lpae");
 255         lpae = env && simple_strtol(env, NULL, 0);
 256
 257         if (lpae) {
 258                 /*
 259                  * the initrd and other reserved memory areas are
 260                  * embedded in in the DTB itslef. fix up these addresses
 261                  * to 36 bit format
 262                  */
 263                 reserve_start = (u64 *)((char *)blob +
 264                                        fdt_off_mem_rsvmap(blob));
 265                 while (1) {
 266                         *reserve_start = __cpu_to_be64(*reserve_start);
 267                         size = __cpu_to_be64(*(reserve_start + 1));
 268                         if (size) {
 269                                 *reserve_start -= CONFIG_SYS_SDRAM_BASE;
 270                                 *reserve_start +=
 271                                         CONFIG_SYS_LPAE_SDRAM_BASE;
 272                                 *reserve_start =
 273                                         __cpu_to_be64(*reserve_start);
 274                         } else {
 275                                 break;
 276                         }
 277                         reserve_start += 2;
 278                 }
 279         }
 280
 281         ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE);
 282 }
 283 #endif /* CONFIG_OF_BOARD_SETUP */
 284
 285 #if defined(CONFIG_DTB_RESELECT)
 286 int __weak embedded_dtb_select(void)
 287 {
 288         return 0;
 289 }
 290 #endif