git.sur5r.net Git - u-boot/blob - board/ti/ks2_evm/board_k2hk.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * K2HK EVM : Board initialization
   4  *
   5  * (C) Copyright 2012-2014
   6  *     Texas Instruments Incorporated, <www.ti.com>
   7  */
   8
   9 #include <common.h>
  10 #include <asm/arch/clock.h>
  11 #include <asm/arch/hardware.h>
  12 #include <asm/ti-common/keystone_net.h>
  13
  14 unsigned int external_clk[ext_clk_count] = {
  15         [sys_clk]       =       122880000,
  16         [alt_core_clk]  =       125000000,
  17         [pa_clk]        =       122880000,
  18         [tetris_clk]    =       125000000,
  19         [ddr3a_clk]     =       100000000,
  20         [ddr3b_clk]     =       100000000,
  21 };
  22
  23 unsigned int get_external_clk(u32 clk)
  24 {
  25         unsigned int clk_freq;
  26
  27         switch (clk) {
  28         case sys_clk:
  29                 clk_freq = 122880000;
  30                 break;
  31         case alt_core_clk:
  32                 clk_freq = 125000000;
  33                 break;
  34         case pa_clk:
  35                 clk_freq = 122880000;
  36                 break;
  37         case tetris_clk:
  38                 clk_freq = 125000000;
  39                 break;
  40         case ddr3a_clk:
  41                 clk_freq = 100000000;
  42                 break;
  43         case ddr3b_clk:
  44                 clk_freq = 100000000;
  45                 break;
  46         default:
  47                 clk_freq = 0;
  48                 break;
  49         }
  50
  51         return clk_freq;
  52 }
  53
  54 static struct pll_init_data core_pll_config[NUM_SPDS] = {
  55         [SPD800]        = CORE_PLL_799,
  56         [SPD1000]       = CORE_PLL_999,
  57         [SPD1200]       = CORE_PLL_1200,
  58 };
  59
  60 s16 divn_val[16] = {
  61         0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  62 };
  63
  64 static struct pll_init_data tetris_pll_config[] = {
  65         [SPD800]        = TETRIS_PLL_800,
  66         [SPD1000]       = TETRIS_PLL_1000,
  67         [SPD1200]       = TETRIS_PLL_1200,
  68         [SPD1350]       = TETRIS_PLL_1350,
  69         [SPD1400]       = TETRIS_PLL_1400,
  70 };
  71
  72 static struct pll_init_data pa_pll_config =
  73         PASS_PLL_983;
  74
  75 struct pll_init_data *get_pll_init_data(int pll)
  76 {
  77         int speed;
  78         struct pll_init_data *data;
  79
  80         switch (pll) {
  81         case MAIN_PLL:
  82                 speed = get_max_dev_speed(speeds);
  83                 data = &core_pll_config[speed];
  84                 break;
  85         case TETRIS_PLL:
  86                 speed = get_max_arm_speed(speeds);
  87                 data = &tetris_pll_config[speed];
  88                 break;
  89         case PASS_PLL:
  90                 data = &pa_pll_config;
  91                 break;
  92         default:
  93                 data = NULL;
  94         }
  95
  96         return data;
  97 }
  98
  99 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 100 struct eth_priv_t eth_priv_cfg[] = {
 101         {
 102                 .int_name       = "K2HK_EMAC",
 103                 .rx_flow        = 22,
 104                 .phy_addr       = 0,
 105                 .slave_port     = 1,
 106                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
 107                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
 108         },
 109         {
 110                 .int_name       = "K2HK_EMAC1",
 111                 .rx_flow        = 23,
 112                 .phy_addr       = 1,
 113                 .slave_port     = 2,
 114                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
 115                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
 116         },
 117         {
 118                 .int_name       = "K2HK_EMAC2",
 119                 .rx_flow        = 24,
 120                 .phy_addr       = 2,
 121                 .slave_port     = 3,
 122                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
 123                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
 124         },
 125         {
 126                 .int_name       = "K2HK_EMAC3",
 127                 .rx_flow        = 25,
 128                 .phy_addr       = 3,
 129                 .slave_port     = 4,
 130                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
 131                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
 132         },
 133 };
 134
 135 int get_num_eth_ports(void)
 136 {
 137         return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
 138 }
 139 #endif
 140
 141 #ifdef CONFIG_BOARD_EARLY_INIT_F
 142 int board_early_init_f(void)
 143 {
 144         init_plls();
 145
 146         return 0;
 147 }
 148 #endif
 149
 150 #if defined(CONFIG_MULTI_DTB_FIT)
 151 int board_fit_config_name_match(const char *name)
 152 {
 153         if (!strcmp(name, "keystone-k2hk-evm"))
 154                 return 0;
 155
 156         return -1;
 157 }
 158 #endif
 159
 160 #ifdef CONFIG_SPL_BUILD
 161 void spl_init_keystone_plls(void)
 162 {
 163         init_plls();
 164 }
 165 #endif