3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
14 * Texas Instruments, <www.ti.com>
15 * Rishi Bhattacharya <rishi@ti.com>
17 * See file CREDITS for list of people who contributed to this
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
38 #if defined(CONFIG_OMAP1610)
39 #include <./configs/omap1510.h>
42 DECLARE_GLOBAL_DATA_PTR;
44 void flash__init (void);
45 void ether__init (void);
46 void set_muxconf_regs (void);
47 void peripheral_power_enable (void);
49 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
51 static inline void delay (unsigned long loops)
53 __asm__ volatile ("1:\n"
55 "bne 1b":"=r" (loops):"0" (loops));
59 * Miscellaneous platform dependent initialisations
64 gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
66 /* adress of boot parameters */
67 gd->bd->bi_boot_params = 0x10000100;
77 /* Configure MUX settings */
79 peripheral_power_enable ();
81 /* this speeds up your boot a quite a bit. However to make it
82 * work, you need make sure your kernel startup flush bug is fixed.
88 /******************************
91 ******************************/
92 void flash__init (void)
94 #define EMIFS_GlB_Config_REG 0xfffecc0c
96 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
97 /* Turn off write protection for flash devices. */
98 regval = regval | 0x0001;
99 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
101 /*************************************************************
103 Description: take the Ethernet controller out of reset and wait
104 for the EEPROM load to complete.
105 *************************************************************/
106 void ether__init (void)
108 #define ETH_CONTROL_REG 0x0480000b
111 *((volatile unsigned short *) 0xfffece08) = 0x03FF;
112 *((volatile unsigned short *) 0xfffb3824) = 0x8000;
113 *((volatile unsigned short *) 0xfffb3830) = 0x0000;
114 *((volatile unsigned short *) 0xfffb3834) = 0x0009;
115 *((volatile unsigned short *) 0xfffb3838) = 0x0009;
116 *((volatile unsigned short *) 0xfffb3818) = 0x0002;
117 *((volatile unsigned short *) 0xfffb382C) = 0x0048;
118 *((volatile unsigned short *) 0xfffb3824) = 0x8603;
120 for (i=0;i<2000;i++);
121 *((volatile unsigned short *) 0xfffb381C) = 0x6610;
123 for (i=0;i<10000;i++);
125 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
131 /******************************
134 ******************************/
137 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
142 void dram_init_banksize(void)
144 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
145 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
148 /******************************************************
149 Routine: set_muxconf_regs
150 Description: Setting up the configuration Mux registers
151 specific to the hardware
152 *******************************************************/
153 void set_muxconf_regs (void)
155 volatile unsigned int *MuxConfReg;
156 /* set each registers to its reset value; */
158 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
159 /* setup for UART1 */
160 *MuxConfReg &= ~(0x02000000); /* bit 25 */
161 /* setup for UART2 */
162 *MuxConfReg &= ~(0x01000000); /* bit 24 */
163 /* Disable Uwire CS Hi-Z */
164 *MuxConfReg |= 0x08000000;
166 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
167 *MuxConfReg = 0x00000000;
169 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
170 *MuxConfReg = 0x00000000;
172 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
173 *MuxConfReg = 0x00000000;
175 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
176 /*setup mux for UART3 */
177 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
178 *MuxConfReg &= ~0x0000003e;
180 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
181 *MuxConfReg = 0x00000000;
183 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
184 /* Disable Uwire CS Hi-Z */
185 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
187 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
188 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
189 /* hardware will actually use TX and RTS based on bit 25 in */
190 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
191 *MuxConfReg |= 0x00201000;
193 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
194 *MuxConfReg = 0x00000000;
196 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
197 *MuxConfReg = 0x00000000;
199 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
200 /* setup for UART2 */
201 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
202 /* hardware will actually use TX and RTS based on bit 24 in */
203 /* FUNC_MUX_CTRL_0. */
204 *MuxConfReg |= 0x09000000;
206 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
207 *MuxConfReg |= 0x00000020;
209 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
210 *MuxConfReg = 0x00000000;
212 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
213 *MuxConfReg = 0x00000000;
214 /* mux setup for SD/MMC driver */
216 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
217 *MuxConfReg &= 0xFFFE0FFF;
219 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
220 *MuxConfReg = 0x00000000;
222 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
223 /* bit 13 for MMC2 XOR_CLK */
224 *MuxConfReg &= ~(0x00002000);
225 /* bit 29 for UART 1 */
226 *MuxConfReg &= ~(0x00002000);
228 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
229 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
230 *MuxConfReg |= 0x000C0000;
232 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
233 *MuxConfReg &= ~(0x00000070);
234 *MuxConfReg &= ~(0x00000008);
235 *MuxConfReg |= 0x00000003;
236 *MuxConfReg |= 0x00000180;
238 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
239 /* bit 17, software controls VBUS */
240 *MuxConfReg &= ~(0x00020000);
241 /* Enable USB 48 and 12M clocks */
242 *MuxConfReg |= 0x00000200;
243 *MuxConfReg &= ~(0x00000180);
244 /*2.75V for MMCSDIO1 */
246 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
247 *MuxConfReg = 0x00001FE7;
249 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
250 *MuxConfReg = 0x00000000;
252 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
253 *MuxConfReg = 0x00000000;
255 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
256 *MuxConfReg = 0x00000000;
258 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
259 *MuxConfReg = 0x00000000;
261 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
262 *MuxConfReg = 0x00000000;
264 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
265 *MuxConfReg = 0x00000000;
266 /* Turn on UART2 48 MHZ clock */
268 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
269 *MuxConfReg |= 0x40000000;
271 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
272 /* setup for USB VBus detection OMAP161x */
273 *MuxConfReg |= 0x00040000; /* bit 18 */
275 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
276 /* PullUps for SD/MMC driver */
277 *MuxConfReg |= ~(0xFFFE0FFF);
279 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
280 *MuxConfReg = COMP_MODE_ENABLE;
283 /******************************************************
284 Routine: peripheral_power_enable
285 Description: Enable the power for UART1
286 *******************************************************/
287 void peripheral_power_enable (void)
289 #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
290 #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
292 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
296 * Check Board Identity
301 int i = getenv_f("serial#", buf, sizeof(buf));
303 puts("Board: OSK5912");
314 #ifdef CONFIG_CMD_NET
315 int board_eth_init(bd_t *bis)
318 #ifdef CONFIG_LAN91C96
319 rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);